Navigate: Advice Beginners BIOS Guide CPUs Links Mainboards Memory Network Storage Video/Sound Cards Contact Forum SiteMap Sponsors WebNews Home	.	.
Prices: Mainboards ABIT ASUS Chaintech Shuttle Soyo Tyan CPU Intel P4 2.4C-800 P4 2.6C-800 P4 2.8C-800 P4 3.0-800 P4 3.2-800 AMD AthlonXP XP 1700+ XP 2000+ XP 2400+ XP 2500+ XP 2700+ XP 3000+ XP 3200+ Athlon64 Athlon64 3200+ Athlon64 FX-51 Opteron Opteron 240 Opteron 242 Opteron 244 Opteron 246 Memory Corsair Crucial Kingston Mushkin OCZ Search Prices:

LOSTCIRCUITS	SHORTCUTS: A new bus speed Heat and Hertz Test Configurations Cachemem, Sandra Everest and Speed Derating Sysnark2004 Internet ContentCreation Office Productivity WorldBench5 -1 WorldBench5 -2 3D Rendering 3ds max Cinebench2003 Futuremarks Gaming A-Z DOOM3 FarCry Conclusions and Paradoxes Give Us Some Feedback to Help Us Improve our Reviews
Intel Pentium4 3.46 Extreme Edition / 925XE chipset
(Review by MS November 16)

Summary

The latest improvement in Intel's desktop line of processor involves the increase in bus speed from 800 to 1066 MHz. Initial reactions after benchmarking the new against the old configuration ranged from silence to outspoken dismay about the lack of difference. Sometimes, there is more to the story than meets the eye and we started digging and digging and more digging. In the end, we reached the verdict that the current combo of the 925XE is better than originally assessed. However, we also have evidence that the recent platform mislaunch is at least partially a result of poor product planning, resulting in a forced mismatching of the wrong components. We leave that part for last in this article, though.

".... Speaking about dinosaurs in the history of central processing units, the CPU in question is none but Intel’s Pentium4, a processor that symbolized the culmination point of engineering prowess at its time and was instrumental in Intel’s securing a leading market role. Yet, in the end, it had to succumb to the smarter design of the in-house competition that started out as an inconspicuous notebook processor. In retrospect, it appears fair to say that the rise and fall of the Pentium4 parallels the dominance and subsequent fading into oblivion of the dinosaurs, the Roman Empire, or the American muscle cars of the 1970ies."

(Computer Cronicle; Vol 13, September 2015)

The Netburst Architecture may end up in journalistic columns or textbooks in a similar fashion as described above, bold and beautiful and the last real raw power approach to desktop computing, pushing the envelope of physics where no processor had gone before – and highlighting the collapse of the MHz bubble as a consequence of its miasmic power demands. However, we are not there yet. Anyone who has followed our articles on processors, system architecture and memory over the past eight years knows that raw CPU speed is only one feature in the overall idiosyncrasy of the performance spectrum, nonetheless, it is an important one. However, it is the interfacing with the system logic through the host bus that enables the processor to fetch data and instructions and turn them into some output that is, er, more or less useful, depending on who one talks to.

Darth Vader ... click for larger image

for the record only

As a rule of thumb, the higher the ratio between the actual clock speed and the bus speed is, the less efficient will be the utilization of system resources by the processor, with the original Pentium and AMD’s K6 processors. The magic number posing an effective performance cap appeared to be 6x, with double or quad pumped host buses, this number naturally needs to be multiplied by the data rate factor. One needs to keep in mind here, though that the primary bottleneck is the memory interface and, thus, dual channel designs have a bit more headroom. However, even in that case, the general rule still holds, what good is a fast processor if it cannot get access to the data at a rate that is required to fill the cachelines and to keep the execution units busy.

Along these lines, one thing that has plagued the Pentium4 from the day of its inception has been the relatively poor utilization of memory bandwidth available. For example, the fastest mainboards based on the Canterwood chipset managed to pull in approximately 5100 MB/sec out of a theoretical maximum bandwidth of 6400 MB/sec or, speaking in terms of bus utilization, somewhere around 75 % bus utilization. Springdale boards were slightly worse. Depending on the benchmark used, Alderwood (i925) or Grantsdale (915) were slightly worser yet (pardon my Chinglish), yielding somewhere between 72 and 75% bus utilization and there was some evidence, mostly from overclocking reports that the host interface was at least partially to blame for the poor utilization.

On the other hand, as we showed in the introductory review of the Prescott stepping, the CPU itself appeared to an instrumental role in the overall management of memory bandwidth. That, in turn, implies that even if the host bus bandwidth is increased, it will only partially ameliorate the bottleneck problem since some of the clogging is found deep inside the CPU pipelines. What it all comes down to is that the proof is in the pudding, that is, without testing it all out, we won’t know whether the increase in bus speed, combined with a lower multiplier will add another boost to the aging Netburst platform, similar to that achieved by going from 533 MHz to 800 MHz.

next page: => MegaHeat Mega-Hurts MegaHertz =>