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| Intel Pentium4 Prescott / 925XE chipset New Dimensions in Performance | |
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(Review by MS November 21, 2004) |
| Intel P4 560+ At: |
Cachemem 2.65
Cachemem is of particular interest in that it allows to dissect the latencies into those that are indigenous to the chipset and CPU as opposed to those originating on the memory modules / devices. Briefly, higher memory latencies (on the module level) will show up as exponential increase in the delta between the corresponding values, that is, as the stride length and consequently the number of page misses incrases, the differences between the latencies at corresponding values will usually double with every doubling of the stride length. Higher chipset latencies, on the other hand, show as a relatively constant offset between the two sets of data.
At the same memory latency settings, there is a noticeable performance increase between the 925X (transparent columns) and the 925XE (solid columns) with respact to the overall access latencies. The difference between the transparent and solid columns is almost identical across the "STRIDE" axis which pinpoints the performance difference to the chipset itself (including the faster host bus interface of the 925XE).
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Intel P4 Northwood 2.4 (hard to find) |
The differences are clearly there, however, by no means can they account for the differences in performance that we see in other benchmarks and we'll have that on the following pages.
next page: => SiSoft Sandra =>
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