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AMD Athlon64 3400+ The speed bump that was more
(Review by MS, January 6, 2004)

AMD has released the latest speedgrade of the Athlon64 family dubbed Athlon64 3400+, sporting the same core frequency as the elusive Athon64 FX-51. However, in contrast to the latter, the Athlon64 3400+ only features a single memory controller and uses the 754 pin form factor, which makes it suitable for a number of budget and not so budget boards.

Aside from the obvious, that is the clash between Intel and AMD in the battle for desktop processor supremacy, there is the lingering question of how much a dual channel memory controller really buys, compared to a single channel solution. In addition, the question is whether the additional latencies of the registered memory have any impact on performance. To rephrase, could it be that a lower latency, lower bandwidth memory interface proves superior compared to a dual channel configuration with extra latencies.

That exactly this may be the case is probably the most open secret in the enthusiast community. Maybe some day even the memory manufacturers may hear of that but I am getting ahead of myself.

After the surprise attack on Intel in form of the Athlon64 3000 an expansion of the product line towards a higher speed grade was the next logical move to be expected from AMD. Since the "standard" Athlon 64 was running at a mere 2 GHz, whereas the Athlon 64 3200 FX-51 was yielded at 2200 MHz, a speed bump of one extra multiplier integer to 2.2 GHz should not cause any problems either.

Three different speedgrades of the Socket 754 Athlon64 (including the A64-3100+ that was never released into the public).

This leaves the Athlon64 family with currently 4 officially released CPUs, namely, the 3000+, 3200+ 3400+ and the 3200+ FX-51. In addition, there are the unreleased XP3100+ as well as the upcoming FX-53

One thing to keep in mind is that the new Athlon64 3000+ is running actually faster than the unreleased "3100+". In most cases, it will also be substantially faster than the latter, despite the smaller Level2 cache.

Aside from upping the speedgrade, there are no additional surprises we know of and, therefore the main issue is the performance scaling as the speed grade increases. Of particular interest in this context is the issue of latency vs. bandwidth, that is, the question of registered DIMMs in a dual channel configuration vs. low latency memory using a single channel design. Aside from a solely academic interest, this topic is highly relevant for the future memory platforms as DDR-II will impose some huge latencies on any platform and where high bandwidth will mask the drawback of latencies on Intel's P4 platform, our initial testings on standard DDR-I already show that increased memory access latencies quite dramatically hurt the Athlon64, regardless of what platform or chipset it is running on.

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