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LOSTCIRCUITS

SHORTCUTS:
Top page
The 64-bit Challenge
Registers, LOADs and STOREs
At One Glance
The Memory Controller
Latencies
Windows and WoW
Tunnels instead of Bridges
The Clocking Scheme
Crush K8 a.k.a. nForce3
The FX-51
Test Setups
Memory Benchmarks
Winstones
Caligari TrueSpace 5.1
Amorphium3
3DStudio Max 5.0
SPECapc's (3dsmax, Maya)
ViewPERF 7.0
Cinebench
3DMarks
Aquamark3, Comanche4, X2
UT2003, Gunmetal
MDK2, Flask 060
64-bit Performance
Encryption
Conclusion
Best Prices on Opterons and Athlon 64 Processors
Hit the Forums and let us know what you think
 AMD Athlon 64 FX-51   
New Frontiers
(Review by MS, September 23, 2003)
Core-Logic Interfacing: The Tunnel Effect

Conventional chipsets as we have come to know them over the past decade usually show the memory controller, the AGP interface as part of the North Bridge, and the I/O controller as part of the South Bridge. In some cases, the two components are combined into a monolithic design. In the case of the Athlon 64, there is no need for a memory controller as part of the core logic, the only thing left of the original design is the AGP interface that branches off the main vein towards the I/O controller. Since most of the control logic is no longer present, the terminology has changed to call the rudimentary link a tunnel rather than a logic device.


Summary diagram of the Athlon 64 chipset architecture.

Because of the "emptyness of the tunnel" we will see a number of monolithic chipsets where everything is combined into a single piece of silicon.

next page:    => Front Side Bus, What Front Side Bus? =>

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