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LOSTCIRCUITS
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| Intel LGA775 SocketT New and (Un) improved? | |
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(Review by MS, July 28, 2004) |
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OCZ PC3200 DUAL-CHANNEL EL DDR 512MB(256X2) 400MHz DDR CAS2 - PLATINUM |
Memory Benchmarks
Different CPUs are handling memory in different fashions and results from theoretical memory benchmarks are not always indicative of the overall performance of the system even in memory intensive applications. Therefore, it is a moot point to compare e.g. Athlon64 with P4 bandwidth without going into very specific analysis of what happens with the data further downstream and we will do that in a follow-up article. For the time being, we are looking at some very basic memory benchmarks and are only comparing side-by-side the different Intel platforms regarding latency and bandwidth in a variety of applications such as SiSoft Sandra, AIDA32, Cachemem 2.65 and A.N.A.
SiSoft Sandra 2004
Sandra is still the classical system analyzer and the memory banchmark allows different modes, that is, with all prefetch and buffering mechanisms either enabled or disabled. One issue to keep in mind is the fact that all data have to pass through the CPU one way or the other and, therefore, the theoretical bandwidth is capped by the host bus interface and the additional pipeline stages leading into the guts of the CPU.
Integer bandwidth: Red; Floating Point Bandwidth: Blue
In theory, with buffering and prefetching enabled, latencies such as those incurred with DDR2 should not have a too dramatic impact, on the contrary, without the just mentioned optimizations, one would expect DDR2 to show some severe shortcomings since that part of the benchmark is very latency-aware. The results show quite the opposite, that is, the actual streaming applications show the i875 chipset clearly ahead in this game, whereas the i925 chipset and especially the i915 chipset fall behind. Not by a huge margin but nonetheless which sort of conforms with the necessity of synchronizers and fifos in the memory data path.
With buffering and prefetching disabled, the rather unexpected happens and the DDR2 platforms, despite their nominally higher latencies are taking the lead. Once again, the i925 chipset is ahead in the game with the i915 trailing by a slim margin and only in the floating point memory bandwidth benchmark pulls the i875 chipset ahead.
| P4 2.4E (Prescott) At: |
Aida32
One thing Sandra does not is to differentiate between reads and writes. AIDA32 does, though, at least that is what the benchmark claims.
Integer bandwidth: Red; Floating Point Bandwidth: Blue
Another surprise here: Write CAS latency on first generation DDR technology is always 1T whereas on DDR2 it is Read CAS latency -1 and, therefore, the write performance of DDR2 should be conceivably lower than that of DDR. Our results indicate the opposite, at least where AIDA32 is concerned. Keep in mind that the results are only indicative of the performance for the specific algorithms used. As an outlook into the future, we ran the memory at low latency (3:2:2) with the CPU at 533 MHz bus speed (ABIT AA8) (1:1 ratio), which opens up the bottleneck a bit to get closer to the theoretical performance of DDR2 - in this case we are getting some 82 % bus utilization.
Overall, the results between the different benchmarks that are supposed to show the same are not consistent, casting some additional doubts on the validity of theoretical benchmarks.
next page: => Memory: CacheMem 2.65 =>
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