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LOSTCIRCUITS
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| Intel's Penryn Core Putting the Metal Back into CMOS | |
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(Author: MS, January 28, 2007) |
Summary
On January 26, 2007, Intel went public with the demonstration of their first processor core - codename Penryn - manufactured on a 45 nm dry lithography and running several operating systems at roughly over 2 GHz core speed. The manufacturing process - P1266 - has been working since January 2006 for the manufacture of the highest density SRAM cell array in the industry and is based on bringing back metal gates into the transistors while replacing the (SiO2) insulator with a precision-manufactured hafnium alloy High-k substrate using ALD technology.
The 45nm process-technology promises to put an end to leakage current runaway and allows the placing of roughly twice as many transistors per area compared to the hitherto used 65 nm (1264) process. Yield analysis is good at this point and the A0 silicon running is no small accomplishment. What else has Intel in stock for the next few months?
And what are IBM / AMD saying to all of this?
Intel's Penryn Processor
A few days ago, we had the privilege to attend Intel's official introduction of their latest processor core, codename Penryn. While the Penryn dies are not yet available, Intel had several prototypes working and running at roughly 2.1 GHz speed, based on the same silicon that was actually used for the first boot less than 3 weeks ago. New product launches are always somewhat treacherous, embargos that end on a Friday night are downright suspicious but in this case it appears as if the choice of date has no significant meaning other than hitting the headlines as early as possible.
Take Out The Metal, Put It Back In
To make a long story short, the presentation was delivered by Mark Bohr, Kaizad Mistry and Steve Smith to introduce what Intel claims is the biggest advancement in transistor technology since the introduction of polysilicon in the late 1960s. Specifically, in the current world of semiconductors, the acronym CMOS as in Complementary Metal Oxide Semiconductor is a misnomer since the metal oxide has been replaced by polysilicon - which was one of the ground-breaking improvements in process technology introduced by Intel. However, during the mid 1990s, it became clear that there were limitations to the transistor design using silicon gate electrodes and siliconoxide (SiO2) as gate insulator material - the insulating layer would have to be disproportionally thick in order to maintain its insulation properties. A number of different metals and oxides were systematically tested in the process labs and finally Hafnium emerged as the element showing superior insulation properties. Hafnium itself is a transition metal closely related to zirconium and titanium and was discovered 1927 by Dirk Coster and Georg von Hevesy in Copenhagen (the Latin name of which is Hafnia).

Intel's 45nm wafer lines are already in full production with more fabs being added as we type this

The yield seems to be on track with the expectations as well.
A few Mouthfuls
At the same time, metal gates are substituted for the silicon electrodes prevailing for the last 40 years. Needless to say that the metal composition of p-type and n-type transistors is significantly different in order to accommodate the different requirements of the two transistor types. Another interesting tidbit is that it appears as if IBM beat Intel to the punch with the new generation of metal transistors - according to the NY-Times, IBM will announce next week a similar type of transistor with full production swing expected in 2008. According to IBM's Bernard Meyerson, their own new Hafnium-based transistors will compare like Ferraris to can openers introduced by Intel - whereas Dan Hutchinson (VLSI Research) claims that Intel's competitors "are going to wake up in terror". Whatever it is, the world will become a better place - or not…

Transmission electron microscope photograph of IMB's new High-K metal gate transistor at 33 nm gate length (reprinted from Chudzik et al., (1/28/2007) High-Performance High-k/Metal Gates for 45 nm CMOS and Beyond with Gate-First Processing).
next page: => Die Shrink and Process Shift Effects =>
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