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LOSTCIRCUITS
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| AMD K6-III+ and K6-2+ Shaptooth's Final Bite | |
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(Review by Aaron Vienot, July 13, 2001) |
| AMD Athlon64 3200+ At: |
Synthetic Benchmarks
RC5
RC5 is an ALU-intensive program, released by Distributed.net as a client for the RSA Labs 64-bit decryption project.
The K6-III+ gets only a slight advantage from its on-die L2 cache. This is not surprising, since RC5 uses hardly any memory transfer. Hence the majority of program instructions and in-progress key packets would be expected to fit into the 64kB L1 cache common to both processors.
CPUMark 99
This Ziff-Davis offering performs synthetic tests and returns a 'rating'. The meaning of the score may be questionable in a cross-platform evaluation, but in our situation makes for a nice comparison:
Something in CPUMark likes the addition of the on-die L2 cache, as the per-clock scores increased as much as 44.9%. Interesting is that the K6-2 scores are bus speed dependent whereas the K6-III+ scores show no such behavior. This suggests that CPUMark is cache-intensive.
Sandra 2001se
To demonstrate the theoretical memory bandwidth improvement the Tri-level cache architecture offers in the K6-III+ as compared to the K6-2, I used SiSoft Sandra Memory benchmark:
The K6-III+ holds a near-constant 21% bandwidth lead over the K6-2 in ALU and about 13% in FPU. Interestingly, for the K6-2 its FPU-memory bandwidth runs roughly a 14% lead over that of its own ALU at every clock, while the K6-III+ narrows the gap to just 6%. Note that the scores only depend on bus speed whereas internal CPU clock speed does not make any difference
next page: => 3DMark2000, FinalReality 1.01 =>
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