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LOSTCIRCUITS

SHORTCUTS:
Top Page
Strained Silicon
Die (re)Organization
Prescott New Features I
Prescott New Features II
Test Setups
Latencies
Sysmark 2004
Internet Content Creation
Office Productivity
3ds max 5.1
Amorphium
Cinebench 2003
D3D Gaming
=> OpenGL
Thermal Issues
Overclocking,
Final Words

Prescott 3.0 Pricing

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 Intel Pentium4 "Prescott"
Strained to the Silicon
(Review by MS, Feb. 1, 2004)
Intel Prescott
Starting at:
Summary

Intel is introducing the new line of P4 procesor based on the Prescott core, the first processor manufactured in a 90 nm process. Main features include a doubling in size of both Level 1 and Level 2 cache as well as the increased pipeline to the processor core, now encompassing 31 pipeline stages. At the same time, a number of enhancements in instructions (SSE3) and functions have been added to the execution units.

The main issues with Prescott appear cache access latencies as well as the longer lead-in times caused by the additional pipeline stages. On the positive side are the reduced manufacturing costs and better scalability with performance. Keep in mind, though, that scalablity goes both ways. Compared to Northwood, Prescott runs rather hot and requires excellent cooling.

Potential shortcomings of Prescott are not present in Intels new flagship processor, that is the P4 ExtremeEdition at 3.4 GHz which is complemented by a 3.4 GHz version of Northwood as well. We have taken three speed grades of Prescott (2.8-3.2GHz) and compared them with the existing Northwood (up to 3.2GHz) and P4EE (3.2 and 3.4 GHz) with respect to performance and thermal dissipation. The result as we hinted above are a variety of different meanings for the term scalability.


A new generation of P4 processor that looks just like the old ones.

Releases of new processor types or steppings are always somewhat thrilling to witness. Or, in Forrest Gump Lingo, any new processor is like a box of chocolates ---. The original P4 Willamette was more MHz than anything else, excluding heat and it took until the release of the Northwood core to get the performance to a presentable level. That doesn't mean that the Willamette was a bad processor, it was just a tad slow and the 217 mm2 die size made it rather expensive to manufacture.

Northwood came, saw and won. The die size was reduced to 146 mm2, the transistor gate length shrank to 60 nm and some two years ago we wrote in our initial review of the Northwood core, then running at a proud 2.2 GHz:

Two years later, that is where we are. Keep in mind that the projected 3.5 GHz includes some safety overhead which caps the actual speed grade somewhere around 3.2 - 3.4 GHz under standard operating conditions that are applicable for any home users. Time for another changing of the guards.

The Dawning of Prescott

The word Prescott has been hovering around in the IT world for quite some time as the Sword of Damocles hanging over AMD, with rumors about the streamlined SSE3 instruction set and additional thread synchronizers to boost HyperThreading performance. An additional feature to position Prescott between the existing Northwood and the as elusive as it is exclusive P4 ExtremeEdition is the increased Level2 cache size of 1 MB. To keep the overall die size within reason, the Prescott core is manufactured in a 90nm process. As additional means to enable future speed grades, the granularity of the pipelines has been increased by 55%, that is, instead of a 20 stage pipeline, Prescott features no less than 31 discrete pipeline stages. Numbers are numbers but what do they actually mean?

The Evolution of the Intel Pentium4 Family

Model NoCore Freq.L1 Data CacheUnified L2 CacheL3 CacheDie SizeProcessInstruction Sets
Willamette < 2.0 GHz8kB 4-way256 kBn/a217 mm2180 nmMMX, SSE, SSE2
Northwood < 3.4 GHz8kB 4-way512 kBn/a146 mm2130 nmMMX, SSE, SSE2
ExtremeEdition
(Gallatin)
3.2 - 3.4 GHz8kB 4-way512 kB2 MB237 mm2130 nmMMX, SSE, SSE2
Prescott2.8 - 3.4 GHz16kB 8-way1024 kBn/a112 mm290 nmMMX, SSE, SSE2, SSE3

next page:    => Prescott Under the Scope =>

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