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I have been working for about one year on the 166 MHz FSB project and once in awhile, I have posted benchmarks, using e.g. the MSI KT3 Ultra ARU or the ASUS A7N266. Unfortunately, other projects always had priority and I never got around to putting the results into perspective. A few months back, we were pondering the possibility of a scheme where each CPU would be running at the default FSB speed of 133 MHz, and the same CPU could default back to a different multiplier in case the 166 MHz or 1/5 PCI divider would kick in. Turns out that this solution was a bit too complicated.

Instead, with the Thoroughbred, we take a step back into the past where CPUs were not multiplier locked as outlined in our original Thoroughbred review. Unfortunately, it turns out that not all mainboards are capable of handling the unlock and, instead, go with the CPUID. In addition, as it has been widely publicized, enabling the 13 x and higher multiplier requires manipulation of the L3 bridge, that is, either you have access to > 13 x or you don't. In the latter case, a 13 x selection will result in a 5 x, a 13.5x in a 5.5 and so on and so forth.

Limitations in Benchmarking

From a benchmarking standpoint, this poses certain limitations. That is, unless we are into comparing apples and oranges, for a fair comparison, we need to keep every bit of hardware identical and the only things to be changed will be the multiplier and frequency settings. It is self-understood that the final clock frequency needs to be the same in all comparative runs.

Close-Up of the L1-L3 bridges, the only difference to the XP2200 is that the latter has the first of the L3 bridges cut as well. The L3 bridge farthest to the right was shorted with a Rear Window Defogger repair kit

Additional requirements are that none of the other buses are running out of spec. That is, by simply raising the FSB from 133 to 166 MHz, in any classical configuration, also the PCI frequency would be increased which not only could be harmful for components but also would introduce another parameter influencing the performance. Therefore, what we need is a mainboard that supports both the ¼ and the 1/5 PCI divider, which are supported by some boards, but not by some others as we found by scoping out the PCI clock input.

To get back to the overall clock frequency, what we need is a frequency that is a common multiple for both 133 and 166 MHz, which leaves 666, 1000, 1333, 1666 and 2000 MHz as possible choices. Given the fact that any CPU can only run at multipliers above OR below 13 x, the 2GHz clock speed falls out since it would require a 12 x and a 15 x multiplier. Theoretically, it is still possible but from a practical standpoint, unlocking and relocking a CPU is not a very efficient way of collecting data, especially if the requirement is to run all benchmarks on the identical system where identical means that we won't even swap processors. The 2.333 GHz clock speed would be nice but, at least with the current sample at hand, it is marginally out of reach.

All considerations taken into account, the natural choice for our benchmarking frequency comes down to 1666 MHz, equaling 10 x 166 and 12.5 x 133 MHz. In addition, we were taking advantage of the current advances in high-end DRAM technology. That is, rather than changing latencies according to some JEDEC specs reflecting commodity parts, we ARE interested in performance and performance deltas based on nothing but frequency differences and leave the higher latencies to the five and tens.

So what did we use, what did we run and what was the outcome?

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