AMD's FX-8150 "Zambezi" processor

[KTE]

You can probably see it in my writing - I want them to design excellent CPUs and improve on their market share/profits/ASPs just as much as I want Intel to then counter it (all for many commonly stated reasons) but so many successive major blunders, faults and wrongs for so long is just unforgivable.

They also imperatively need to improve their market penetration and awareness. I've traveled and asked at most major M.E., Central and Southern Asian regions over the past 12 months. Around 2 billion people. I swear to God it was deja vu repeatedly hearing the biggest computing market zones in their largest economical cities parroting the "Who is AMD?" line for the vast majority. Their "experts engineers/technicians" with much higher computing degrees than me often expanded to "They have very slow, very hot processors that become faulty fast". Store after store. They did not hold any AMD stock. The 1/10,000 stores that did, held only 5-6 year old, poor chips and based their AMD onslaught purely on them.

AMD needs to diversify and capture the main growth markets/economies. These are places more populous than most Occidental nations where people are paying $600-1000 for a poor P4/C2D 90nm-65nm build TODAY. Prices for low-end 45nm C2D are $1-1.5k at the cheapest. I'll be glad to name the top dog IT market "towns" within the largest cities featuring 60-70 such stores which supply each of their respective nations main computing chain. Really poor, obsolete tech is very expensive in these regions. Mobile and Desktop demand is extremely high and rising (not Server). Even if AMD could set up 2 agreements with wholesalers, for Bobcat and Llano deliveries, coupled with promotional offers, you are looking at massive sales. Bobcat and Llano based chips are exactly what is being seeked here.

[M_S]

I guess that the cancellation of the future Bobcats are just what the doctor did not order. At the same time, though, Llano is the more balanced architecture and if they can scale it successfully to the 2xx node, it may be a better choice. Needless to say that they need to overcome the issues with "split dies" but maybe that is where TSMC can throw in some expertise that seems to have lacked at GloFo.

The one thing that is really paramount for AMD is to get rid of the overdiversification of their designs. It is nice to have all these products available but one good product is better than 10 mediocre ones and I am not talking about the design or concept here but about the fine-tuning that takes some 90% of the efforts going into the product. Again, that's where Llano emerges as the most promising product at least in my view.

Even BD may have some renaissance, not in the present version but as a concept and stepping stone towards a fully modular approach where the individual building blocks are well understood and the key effort can be reduced towards understanding the interactions of a large population of units. Unfortunately for AMD, of course, Intel has Knight's Corner already in a fairly advanced state but this still appears to be the direction in which things are going. More unfortunate even is the fact that there appears very little logic behind the evolution of computer architecture in the last 5 years, rather it reminds me a bit of kindergarten where the clumsy bully who can't do a few things makes up the rules to ban the exact things he lacks proficiency at. But I digress ....

My prediction, though is that there will be another bubble that will burst and cause an avalanche of events and maybe ARM will be coming out on top.

[Aussie FX]

I think ditching Bobcat was a good idea. It would have taken some guts to cut what is currently a successful line but has a limited future.

They can't get the power down to compete with ARM.

I have a feeling that's the direction AMD is heading although there are a lot of players in that space.

Now where did I put that crystal ball...

[M_S]

Tye had said it all along I think he really had the crystal ball on that one but like I said before, rational reasoning is not how the market works. On a side note, I had an interesting dialog with JF which ended with him saying that he doesn't know anyone in AMD's server group. Maybe he meant anyone anymore...

[KTE]

There's not too much difference in BC and BD in current app IPC but a massive difference in cost, size, power and frequency range, ceteris paribus. You just can't take a BD core and downsize/downclock for the low-end low-power market as too many netizens like to believe - that's not possible. You've got a new Lenovo guy running the show from a company that literally only dealt with Intel processors (1-3 half-hearted BC designs). They scrapped BC and this next years BC based successors 'cus GloFo screwed up big time the past full year and for most of the next destroying a lot of cash/potential for AMD, including not hitting agreed process metrics which meant most of the big players who gave us BC, jumped. I don't really know who the heck is left at AMD (in reasonable capacity) that previously designed a successful high-volume processor. In my mental scrap book - Johnson, Keller, Frank, McGrath, Weber, Olson Glew, Witt, Heye, Favor, Meyer and Burgess - they're all out.

The only two remaining I recall are Christie and Moore, with a different role, and Moore with a failed 2005 architecture to his name - it was always known and designed as a throughput core right since the beginning (when BC also began):
http://www.anandtech.com/show/1655
http://www.anandtech.com/show/1822

I mean: http://www.eetimes.com/electronics-news ... fits-TSMC-

GloFo sources clearly mention no process problems for BD, only for Llano, which they state matches TSMCs Brazos yields.

GloFo being ruined by the AMD contract - I swear, I see Samsung homing in. If they ever took over AMD itself, they could leverage AMDs Fusion capabilities nicely and promptly. Samsung are the numero uno player in the Tablet/TabletPC/Smartphone industry. The race in their segments is basically to achieve higher MHz/Cores/GPU power at equivalent power metrics. Bobcat at 40nm has that (except even lower variants which I'm sure given the market and sales, is easily doable with the design at the same process node).

[bldegle2]

I am surely disappointed about AMD now, what are they going to do to at least keep the gap from turning into the Grand Canyon....friggin Zambezi bustola....

I checked into swapping back to Intel, it is going to cost in the neighborhood of $600 to $800+ for 2600k and a real beast of a motherboard, even AsRock high end is around $400 for the MB only...

Thankfully, all I need is a CPU and MB, all the rest of my stuff will migrate...and I can sell my other stuff to offset the much higher cost....

Intel is friggin' too expensive, period...

Laterzzzzz................

[Aussie FX]

Well I just bought an 8120 and Crosshair V and I have a measurable 25% speedup in my main app.

That's at 3.1GHz vs 3.2 from the 1090T it replaced.

BD's big failure was peoples expectations, heck it matches/beats a 2500K yet nobody is calling that a fail.
I never expected it to catch the 2600 so I'm really not as disappointed as some.

My 8120 was $120 less than a 2600K and $70 less than a 2500K.

[M_S]

Pete, what is the app you are talking about? Don't know whether it is relevant for any main stream user but I am always looking for some new stuff that makes sense to run.

[Mr Bill]

Does it matter, or change our perception of the FX-8150 That it has 1.2 billion transistors rather than 2 billion?

http://www.anandtech.com/show/5176/amd- ... 12b-not-2b

[M_S]

I guess the breaking news of the day is the supposed misrepresentation of the transistor count:

http://www.anandtech.com/show/5176/amd- ... 12b-not-2b

1.2 B transistors instead of 2 B is a huge difference. Needless to say that Anand's musings about transistor density appear kind of pointless since the caches are the biggest transistor count hogs and that's where you get the highest densities in repetitive, packed, patterns.

Looking at the raw numbers, the new count does not appear likely because we have 16 MB of combined L2 and L3 cache, with each cell using 8(?) transistors and the overall density including full ECC protection. If those numbers are combined, the transistor count for the caches alone is 16M *8 (T/bit) * 9 (bit/Byte) = 1.152 B transistors.

Correction, it is a 6T SRAM design that is used so the transistor count without spares and logic for the L2+L3 is 906 Million, leaving 350 Million transistors for cores, memory controller, HT and L1 caches ...

So, is this another PR stint of AMD?