Navigate: Advice Beginners BIOS Guide CPUs Links Mainboards Memory Network Storage Video/Sound Cards Contact Forum SiteMap Sponsors WebNews Home	.	.
Prices: Mainboards ABIT ASUS Chaintech Shuttle Soyo Tyan CPU Intel P4 2.4C-800 P4 2.6C-800 P4 2.8C-800 P4 3.0-800 P4 3.2-800 AMD AthlonXP XP 1700+ XP 2000+ XP 2400+ XP 2500+ XP 2700+ XP 3000+ XP 3200+ Athlon64 Athlon64 3200+ Athlon64 FX-51 Opteron Opteron 240 Opteron 242 Opteron 244 Opteron 246 Memory Corsair Crucial Kingston Mushkin OCZ Search Prices:

Each track or cylinder can only accommodate a certain number of data and, often enough, coherent or logically connected data will be written across the track boundaries, meaning that the data blocks will start on one track and then continue on the adjacent track, typically moving from OD to ID. The hierarchy of moving from OD to ID is important for the alignment of the LBAs using a skewed scheme with the purpose of avoiding a full rotational latency upon track-switching.

Offsetting the beginning LBA of each cylinder or track compared to the last LBA of the "previous", more outward located track gives the head time to reposition itself over the track after track switching. It is important to understand here that the logical read sequence for any data follows ascending LBAs, meaning that data are read from the outer to the inner tracks of the media.

Moving from one track to another and realigning / lowering the heads cannot be done in zero-time, meaning that if the LBA boundaries were lined up, the time necessary for track-switching would cause the head to miss the next LBA. Therefore, consecutive LBAs across track boundaries will be arranged with a rotational offset or skew.

Note that read and write positioning require different levels of precision and the skew needs to accommodate the worst possible (write) scenario. This gives away an additional bit of read performance upon track switching. However, compared to the performance hit encountered if the LBA were missed and which would result in one full rotational latency, the loss is negligible.

Summary: Effective Internal Performance (Tx_D)

Effective internal performance or effective media transfer rate is defined by the media density times the linear velocity relative to the head minus housekeeping data that are interspersed with the actual data on the platters. Higher area densities and higher rotational speeds will increase the effective internal performance, higher amounts of housekeeping data as required for e.g. positional corrections will reduce the effective transfer rate. Depending on the drive's targeted environment, the house-keeping overhead will vary, e.g. laptop drives that are subject to higher levels of vibrations will need more "corrective actions" / repositioning than desktop drives. Likewise, rack-mounted server drives may require more servo data since vibrations can easily propagate throughout an entire rack.

It should also be clear now why the relatively higher amount of servo data on high-end, e.g. SCSI drives will result in lower performance than that of comparable (in terms of rpm) desktop drives. On the other hand, within the environment that SCSI drives usually are operating in, the very same "faster" desktop drives would run into the need for constant recalibration which would cause a severe performance hit under operational conditions.

Sneak Preview:

• Average Sequential tranfers
• READ vs WRITE performance
• Internal vs. Host Transfer Rate
• Speed Matching Conditions

next page:    => Head over to Part II =>