|
Advice Beginners BIOS Guide CPUs Links Mainboards Memory Network Storage Video/Sound Cards Contact Forum SiteMap Sponsors WebNews Home |
. | . |
Prices: Mainboards ABIT ASUS Chaintech Shuttle Soyo Tyan CPU Intel P4 2.4C-800 P4 2.6C-800 P4 2.8C-800 P4 3.0-800 P4 3.2-800 AMD AthlonXP XP 1700+ XP 2000+ XP 2400+ XP 2500+ XP 2700+ XP 3000+ XP 3200+ Athlon64 Athlon64 3200+ Athlon64 FX-51 Opteron Opteron 240 Opteron 242 Opteron 244 Opteron 246 Memory Corsair Crucial Kingston Mushkin OCZ |
LOSTCIRCUITS |
||
| As the Hard Disc Spins III: Effective Host Transfer Rates | ||
|
(Review by MS, December 22, 2003) | ||
|
WD Raptor WD360GD |
There are a number of interesting data that can be garnered from the ATTO benchmark shown above. For example, how many I/Os per second are we looking at? The answer is very simple, all we need to do is to take the overall transfer rate at any given transfer size and divide it through the actual number of blocks where 1 block equals ½ KByte. In other words, a transfer size of 0.5 KB equals a single block, 1 KB equals two blocks and so on. We have done the math for you already, and here are the results.

At the top part of the graph, the command overhead is the dominating factor that limits performance. Increasing the size of the data transfer has only a negligible impact on the number of I/Os per second. This is to be expected since the data itself are only making a small fraction of the entire transfers. The first visible impact on the number of transactions occurs at the 4 KB transfer block. In that case, the ratio between command and data is still 2:1. At the 8 KB transfer setting, command and data are equally represented on the bus and above that setting, the data portion is dominating the bus. The side effect is that the effective host transfer rate is pushing against the effective internal performance, which becomes the limiting factor. As soon as the effective internal drive performance is saturated, the only effect of increasing the transfer block size is that the number of I/Os decreases, that is the number of transaction is inversely related to the number of I/Os. Either the cache is filling up and new data can only be accepted if cache areas are being freed by writing the data to the media (on writes) or else, the cache is empty and data can only be transferred to the bus at the rate they are accessed from the media.
One thing is important: As long as small blocks of data are transferred with a large command overhead, the drive performance vs. host transfer rate is not that crucial. if the data size increases, the effective host transfer rate needs to be higher than the effective internal media transfer rate, otherwise, it will result in a speed matching condition.
next page: => Busmasters, Latencies and Speedmatching Issues =>
All advice and educational articles on LostCircuits are free, but if you feel you can, please make a small donation to us!