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LOSTCIRCUITS

SHORTCUTS:
Busmasters
DMA, CPU utilization
and Burstrates

PCI Latencies
and Write Combining

Speed Matching Conditions

Barracuda 7200.7 - 160 GB
On Dealtime

Please give us some feedback to help us improve our reviews

 As the Hard Disc Spins
IV: DMAs, Latencies and Speed Matching
(Review by MS, December 29, 2003)
WD Raptor
WD360GD
Summary

IN THE PREVIOUS INSTALLMENTS of this mini series, I went over some very basic internal drive parameters like media performance and access latencies as well as differences between reads and writes and, finally, the role of the host transfer rate in the interfacing of the drive with the outside world. Whereas the first couple of parameters are dictated almost exclusively by the drive architecture, the host transfer rate is subjected to a variety of factors that are dependent on software in the broadest sense of the word.


In the last article, I briefly brushed on the issue that current version of Windows, as well as Unix and Linux systems are not real time operating systems, rather, software stacks are created to allow internal scheduling of the execution of events. That, however, also means that there can be conflicts between the availability of interrupts and the software stacks, that is, the hardware is fighting against the software for priority. The result in cases like that is that there is no winner, performance is being reduced and at the same time, CPU usage is increased because of access errors and retries on the PCI bus and ineffective execution of transfers.

Some of the issues with poor utilization are plain and simply a matter of incorrect or marginally functional software. One good example are the chipset and bus master drivers that are necessary for almost any chipset not conforming to the original Intel specifications. That is, there are hardware bridges and buffers that need to be configured in order to optimally interface with the Microsoft OS environment by means of drivers. Only in a few rare instances will the new interface be completely transparent to the OS, one example is the ICH5 Serial ATA interface introduced by Intel with the Canterwood / Springdale chipset. However, even in this case, the transparency (the fact that the OS does not even notice anything has changed) is limited to the non RAID version of the same south bridge, namely the ICH5R, in that for RAID operation the installation of drivers will be necessary.

The VIA Hyperion drivers are the currently last step in a development that we have followed for about 5 years to optimize the South Bridge and IDE controller interaction with the Windows environment by means of bus master and GART drivers.

"Third Party chipsets" and external controllers will in almost all cases require the installation of extra drivers, not necessarily for any basic functionality but definitely for enabling performance while reducing CPU utilization. A few well known examples are the VIA or nVidia or any other chipset bus master drivers.

next page:    => Hard Disc Drive Architecture VI: DMA and BusMastering =>

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