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| As the Hard Disc Spins IV: DMAs, Latencies and Speed Matching | ||
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(Review by MS, December 29, 2003) | ||
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WD Raptor WD360GD |
Briefly, what is a bus master? A bus master is a device that can be a master on the PCI bus, which means nothing else than the fact that the device itself can set up its own direct memory access (DMA) channels. Another term used often in this connection is the so-called FirstPartyDMA (FPDMA) and we will hear about FPDMA quite a bit more in the context of Serial ATA. Keep in mind that when talking about FPDMA or bus mastering in the context of Parallel ATA, the term always refers to the controller and not to the drives, which are bus slaves and can only use ThirdPartyDMA This will become important later.
If there is a bus master, there is a need for bus master drivers, that is, the piece of software that tells the operating system how to use the bus master, especially for the interfacing of the device buffers or fifos (first-in/first-out pipelines) with the memory via DMA channels. In other words, without bus master drivers, there will be no or only crippled DMA and that is what everybody can easily verify by running e.g. HDTach or any other benchmark program for HDDs with or without bus master drivers. In the latter case, the CPU utilization will be between 80 and 95% and the burst rates or effective host transfer rates will hardly go beyond the media or effective internal transfer rate. The complete lack of bus master drivers is one thing, another, more common scenario is the presence of badly optimized bus master drivers. Keep in mind that those drivers appear to be amongst the most difficult pieces of software to write, since it is not only the performance that matters but also the compatibility with all different types of ATA and ATAPI devices. A case in point are the special purpose SW IDE drivers released by nVidia with the 2.03 unified chipset drivers for the nForce2.
Maxtor D740X6L UATA-133 HDD on Shuttle SN41G2 (nVidia nForce2): Using the standard WindowsXP drivers, the burst transfer rate is limited to 90 MB/sec and the CPU usage is a whopping 57%.
Using the Special Purpose SW IDE drivers, the burst rate (plus overhead) approaches the theoretical limit of the PCI bus. Note that also the CPU usage drops to ~10 %, which is still relatively high but much better than the ~60% used up in the case of the generic drivers. Unfortunately the SW drivers have some compatiblity issues with some ATAPI devices, especially optical burners. Once again, note that the sequential transfers and the Random Access Time are identical (within the margins of error) since they are independent of the platform and solely reflect the capabilities (and wear) of the drive.
Keep in mind that the standard drivers already allow busmastering, they are just not optimized for the MCP to the same degree as the nVidia drivers.
next page: => PCI Latency and Write Combining =>
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