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Intel's Westmere - 32nm / On-Chip Graphics |
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Written by Michael Schuette
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Feb 08, 2009 at 06:00 AM |
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Page 1 of 5
Intel today unveiled the first working processor based on the new 32nm P1268 process using immersion lithography on critical layers with 9 layers low-k copper interconnect. The new manufacturing process uses immersion only on some of the layers – described as critical – which comprise the actual NMOS and PMOS devices, whereas the interconnects are still done in a dry lithography process. The new processes P1268 (CPU) and P1269 (SOC) are yielding better than expected, allowing accelerated product ramping with an anticipated launch in Q4 2009 instead of Q1 2010.
The migration to 32 nm is the typical “Tock” in Intel’s Tick-Tock development model where every 2 year’s Tick is the introduction of a new architecture based on the existing process technology, followed in the next year by the "Tock" of migrating to the next design process. What sets Intel apart from AMD and other semiconductor companies is that all tools and processes are developed internally, making Intel independent from fluctuation in the market - or good will of partners.

Intel's Tick-Tock Development Model
In short, the high-lights of the 32 nm technology are:
- 2nd generation high-k in combination with metal gate transistors
- 0.9nm equivalent oxide thickness high-k
(scaled from 1.0 nm on 45nm process)
- Replacement Metal Gate process flow
- 30nm gate length
- 4th generation strained silicon
- Immersion lithography on critical layers
- ~70% dimension scaling from 45 to 32 nm process
- Pb-free and halogen-free packages
The results are:
- > 22% performance increase
- tightest reported gate pitch
- highest reported drive currents
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Last Updated ( Oct 01, 2009 at 12:28 PM )
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