L O S T C I R C U I T S

Mountain View, California-based Rambus, Inc. is a company name, the mere mentioning of which still sends shivers down the spine of many a seasoned JEDEC memory warrior. The saga about Rambus’ involvement in JEDEC, its exodus from the standards organization and allegations of fraudulent behavior is too convoluted to even scratch the surface, even though at one point we, that is LostCircuits, were inadvertently suckered into what has made history as the “Rambus Wars”. Suffice it to say that history is generally written by the winners and in this case, there are no clear winners, therefore, there is no clear story either. There was dirty fighting on both sides and unfortunately, those who were left holding the bag were not the ones who created all the mess to begin with. As so often, however, good things can come out of anything, in this case some excellent relationships with several Rambus employees who were kind enough to explain the latest technology stint from the “baddest boys in the memory business”.

Enter Threaded DDR3 Modules

Using standard off-the-shelf components, Threaded DDR3 Memory Modules are capable of providing up to 50% bandwidth increase at lower power consumption. Needless to say that either benefit depends on the system configuration and workload but we will dissect the technology and its benefits and drawbacks on the following pages.

To be clear from the get-go, the original Rambus technology as implemented in the Rambus Inline Memory Modules (RIMMs) used in Intel’s i820 and i840 chipsets is obsolete and not a topic here. XDR/XDR2 and mobile memory initiative silicon vehicle are other legs Rambus is standing on but they are not the topic here either. The technology we are discussing here instead is an adaptation of standard DDR3 technology to better fit the requirement of multi-core, multi-CPU computing.