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The test setup and criteria

We used two system configurations for our evaluation:

• ASUS CUSL2 (i815E-based)
• Intel PIII FC-PGA (Coppermine) 933 (unlocked engineering sample)

• MSI K7T Pro
• AMD Duron 650 (unlocked)

Common system components:

• IBM DPTA 372050 Deskstar
• ASUS 40X CDROM
• MSI MS 8809 Phantom GeForce 256 (SDRAM)
• Alps Electric floppy disk drive
• D-Link DFE 530 ethernet adapter
• Windows98 (first edition)

Criteria used for determination of stable operation at a given bus speed / latency setting were:

• Successful boot into Win98
• Expendable timedemo at least 3 times without glitch
• Content Creation Winstone2000

A little bit of background

Within the last year, chipsets have come a long way, which also means that there have been some improvements in the general timing characteristics, especially the setup time. The setup time is one of the crucial parameters for DIMM performance, even though it is a feature of the chipset rather than the system memory. Setup time is the interval that the chipset needs to get ready to receive the data read from the system memory. Setup time further needs to be included within the time margins of the clock cycle time (tCK), that is, the inverse value of the memory bus speed.

Setup time is constant and generally in the order of about 1.5 to 2 ns. Setup time and clock access time both have to be accommodated within the clock cycle time. As an example, a memory bus running at 133 MHz results in a clock cycle time of 1000ns/133 = 7.5 ns. If the setup time of the chipset is only 1 ns, the clock access time (tAC can theoretically be as long as 6.5 ns and the sum of both timing values would still fit into tCK.

Setup times have shortened considerably in the past year where, in most cases everyone was still dealing with 2 ns, leaving barely enough margin to run PC 133 DIMMs at the specified tAC of 5.4 ns.

When we started to evaluate PC133 DIMMs some 18 months ago, the top performers were operating stable up to a frequency of some 140 MHz at Cas latency of 2 cycles (CL-2). The tests were performed on an ASUS P2B-F 1.10 using a Pentium II 350 (Deschutes, unlocked) CPU. 140 MHz at CL-2 was about the limit at the time when the tests were performed and going beyond 150 MHz was impossible due to chipset limitations. Over the course of the past year, we regularly exceeded these values on other test systems and the results were included in the DIMM Performance Comparison Chart. Considering the advances in chipset technology made in the last year, we thought, it would be interesting to reevaluate the older DIMMs on current hardware and give a manufacturer specific Progress Report as well as to look whether any newcomers would challenge the established leaders in memory technology.

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