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The most critical parameters that need to be taken into consideration are

• - clockcycle time (tCK; 1sec / FSB frequency), determined by the bus speed.
• - clock access time (tAC), time until data output starts
• - output hold time (tOH), time for which the data are valid after the next clock edge
• - data valid window (tDV), time needed by the chipset to read the data from the RAM

  From the above parameters, it is possible to calculate the data valid window (tDV) as:

tDV = tCK - tAC + tOH

or data valid window = clock cycle time - clock access time + data holding time, where the only parameter intrinsic to the memory itself is the clock access time. Most current PC-100 compliant chipsets, e.g. the BX440 chipset require a minimum data valid window of 6-7 ns. The clock cycle time is 10 ns at 100 MHz and the output hold time 3 ns

By entering these numbers into the equation one gets

Spec:	tDV	=tCK	-tAC	+tOH
PC100	7ns	=10ns	-6ns	+3ns

If one would speed up the bus to 133 MHz, this would reduce the time available for the clock access to:

Luckily, in reality the situation is slightly different in that the valid time window can be reduced to about 6 ns, and the output hold can be prolonged slightly. The most important improvement, however, will be the new PC 133 chipsets in the form of the VIA Apollo Pro Plus 133 and the Intel 820 which are capable of extracting the data within less than 4.6 ns instead of the 6-7 ns of PC 100 chipsets.

If one enters the new numbers into the equation, it reads like

Spec:	tDV	=tCK	-tAC	+tOH
PC133	4.6ns	=7.5ns	-tAC	+2.5ns

and therefore the new equation reads like

Note that, in order to account for the higher bus speed the output hold had to be shortened from 3 ns to 2.5 ns. Still, what we get is

In other words, with the new PC 133 chipsets the RAM itself does not need that much of an improvement to meet the specifications since about half of the load is already carried by the new semiconductor technology of the chipset.

Why are we elaborating on this? For a very simple reason which is that we did not have a PC 133 system available to test the PC-133 Corsair DIMMs. Unfortunately, VIA did not respond to our repeated inquiries for a pre-production PC 133 test board and, thus, we had to run the test under PC 100 conditions. Unfair? Yes, maybe, but that’s why we point out these problems.

However, the good aspect is that any performance achieved under current PC-100 conditions will be surpassed by a quantum leap as soon as the PC 133 standards are implemented.

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