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After being at an all time low of about 50 cents / MegaByte, memory prices have lately been subjected to a roller-coaster ride, skyrocketing to the astronomic number of about $3-$4 for the same storage capacity within a few months. There are several reasons, foremost the trend among manufacturers to move towards greater density / capacity package size causing reduced manufacturing capacity for 32 or 64 MByte DIMMs in order to stay competitive. It is almost comical, though that, just when memory prices were at their peak, a new generation of DIMM has become available boasting a solid 256 Mbytes in unbuffered form. The keyword here is unbuffered, since buffered a.k.a. registered DIMMs of this magnitude have been available for quite some time.

Buffered / unbuffered

What is the difference between the two categories? Essentially, what it comes down to is that there are additional register chips on the individual DIMMs. The function of these register chips is to serve as interface between the chipset and the individual memory chips.

The Chipset Bottleneck

So why would we need an additional interface if e.g. the PII and P!!! are capable of caching 4 GBytes of RAM. A simplified answer is that the amount of memory depends on the chipset and not on the CPU. At the time when current chipsets were conceived, nobody could envision that there would be a situation in the near future where more than 256 Mbytes of system memory could be used in a PC. Remember the sweepstakes put out by Kingston Memory about 2 years ago: “What would you do if you had 256 MBytes of RAM” where the first price was exactly the target of the question: 256 MBytes of RAM. As dazzling as this number was 2 years ago, current applications, particularly video editing, and the decay of memory pricing (just disregard the current high tide, it’ll pass) have led to demands beyond the 64 MB useable by the TX/VX chipsets. Consequently, even the 256 MB limitation makes any ZX chipset system look rather anemic for anyone shooting for high end graphics / video applications.

So what can be done to increase the amount of memory that can be run in a system? To answer this question, a bit of background is necessary on memory architecture. Memory is nothing but a high density array of capacitors that can be charged. The usual package format is a memory chip. Every memory chip consists of addresses and bits. Thus if there are 16 mega-addresses x 4 bit, the chip will have a density of 64 Mbit. Eight bit make one Byte and thus, you need 8 chips of the above mentioned density to make a 64MByte DIMM. In order to get up to 128 Mbyte DIMMs, consequently the number of chips needs to be doubled, usually resulting in the configuration of double-sided DIMMs with eight chips on each side. In this case the DIMM is usually configured as 2 bank module.

It is hard to squeeze more than 16 chips onto one DIMM and, thus, if one wants to produce 256 MB DIMMs, either the 16M or the 4 bit need to be doubled. Up to now, 8 bit parts have been hard to come by and thus memory increase has historically been based on doubling the addresses. However, right here is the fundamental problem that limits the memory that can be addressed by the chipset: the availability of address lines. That is, the BX chipset cannot generate more than 16 million addresses, because a vital line, that is address line 812 cannot be generated. Therefore, the BX chipset chipset will simply not see the additional memory.

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