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Data Strobe or Source-Synchronous Clocking

DDR is no longer using a central clock, rather, data are transmitted using a clock-forwarding scheme also known as strobing or source synchronous clocking. Briefly, all data transmitted across any bus have to originate at a sender and are captured by a receiver. If a clock signal is forwarded from the source synchronously with the data, trace delays will no longer matter because the clock signal or strobe arrives at the receiver at the same time as the data. In a bi-directional bus, the different directions can further be specified by aligning the data to the strobe edge or the center of the strobe signal in order to make sure that e.g. signal reflections are not erroneously interpreted as data. In the case of DDR, Read data are Edge-aligned with the strobe, Writes are Center-aligned.

Differential vs. Unidirectional

The cleanest and most reliable way of transmitting data is a differential voltage swing. Briefly, instead of running one single signal against a reference standard and determining the 0s and 1s according to which side of the cross-over point the signal is at, one takes two signals and runs them against each other. This principle is applied in the form of low voltage differential signaling in Serial ATA and most other serial interfaces. The same concept can also be used for strobing, that is, instead of having a single signal using a voltage swing around a reference point, two signals are running against each other. The advantages are easy and precise calibration and, further, suppression of simultaneously switching output noise (SSO Noise) because for each signal going from high to low, another one will go from low to high. As a result, there won’t be any victim effects on lines going the opposite way for the simple reason that there is no opposite way and also, because the net effect in the case of differential strobes is always zero.

Differential strobing comes with a legacy, though, which is the requirement for additional pins. That is, because two signals are running in counterphase, each strobe requires two pins. Each Byte width on the DRAM level requires 1 strobe, and therefore, each 8-bit wide chip requires 2 strobe pins for the DQS and /DQS.

Strobing Differences Between (G)DDR-II and GDDR3. To make a long story short, GDDR3 requires a shorter preamble for the data strobe because it is always valid whereas DDR and DDR2 first have to find the DQS preamble that is, at idle between the two possible logical states. Therefore, the hypothetical response time of GDDR3 is shorter. Note that in the case of DDR2 the differential between the two counterphase signals is shown rather than plotting both strobes.

Another improvement of the strobing scheme is to use unidirectional strobes, that is, separate strobes for Read and Write transactions. The strobes are forwarded along with the data and define the data valid window or Data-I. It is somewhat intuitive that data moving in opposite directions are better synchronized with strobes that are running along with them on separate lines than with a bi-directional strobe, which is comparable with a one size fits all solution. Moreover, unidirectional strobes are always valid, meaning that there is no lag time involved. Certainly, there will be differences in different applications and platforms, that is, a point to point connection as it is found in graphics cards will have different requirements than a system bus interface with connectors (DIMM slots) in the data path.

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