Navigate: Advice Beginners BIOS Guide CPUs Links Mainboards Memory Network Storage Video/Sound Cards Contact Forum SiteMap Sponsors WebNews Home	.	.
CPU Intel P4 840 D P4 820 D P4 630 P4 640 P4 650 P4 660 P4 670 AMD Athlon64 3500+ 3700+ 3800+ 4000+ X2-3800+ X2-4200+ X2-4400+ X2-4600+ X2-4800+ 1-Way Opteron Opteron 144 Opteron 146 Opteron 148 Opteron 150 Opteron 152 2-Way Opteron Opteron 240 Opteron 242 Opteron 244 Opteron 246 Opteron 248 Opteron 250 Opteron 252 2-Way Dual Core Opteron Opteron 270 Opteron 275 nVidia GF 7800GT GF 6800GT GF 6600GT ATI R X850 XT PE R X850 XT R X800 XT PE R X800 XT R X800 XL Memory Corsair Crucial Kingston Mushkin OCZ What are you shopping for?

The SPD Challenge

Moving to higher speed grades also requires changing of the specs. The specs are written in form of data sheets, the electronic form of which is contained in [Hex] format within the SPD EEPROM. These numbers are then then read by the mainboard and converted into the appropriate latency settings as well as the overall configuration of the DIMM slot state machine. Important parameters include the overall density of the module and the number of physical banks as well as the minimum times required to execute e.g. a row activate or a read command. Keep in mind that these values are not given in form of latency cycles but rather in form of ns required to complete each operation. It is up to the BIOS and the chipset then to calculate the latency cycles that satisfy the timing windows. One example would be a CAS latency of 11 ns which would mean that a 333 MHz data rate (clock cycle time of 6ns) would allow data output after two cycles (2 x 6ns = 12 ns), whereas the same module running at DDR400 speed would require a minimum of 2.5 cycles (2.5 x 5ns = 12.5 ns). Bottom line is that the product of cycle time and number of cycles always has to be greater than the value stored in the SPD.

All of this looks rather straight-forward, but it does require a BIOS that is actually functional and this is where the problems are starting. The simplest and most widely shortcut to malfunction is to read only the vendor ID and if it is not in the BIOS data base, simply to assign the most relaxed latency parameters. Fortunately, this practice is slowly becoming unfashionable even though, until maybe a year ago it was used by more board vendors than one would think. That still does not mean that all SPDs are read correctly now. Many boards read the frequency specs of the memory modules and some of the latencies but apply latency settings for e.g. PC2100 operation simultaneous with an operating frequency of e.g. DDR333 or DDR400. Needless to say that this will often enough cause POST failure, particularly with more expensive, faster modules.

The easy way out for many mainboard manufacturers is to completely disregard the SPD and, instead, to supply certain templates that will override the SPD and invoke some generic latency settings, most of the time called "Aggressive" or "Turbo". Often enough, these settings feature latencies that resemble some random crab-shots rather than any understanding of DRAM technology.

For most manufacturers of high-end memory modules, this poses an interesting situation in that it is not possible to sell modules with SPD programming that would reflect their actual capabilities without running the risk of some boards simply not POSTing with these modules unless the latencies are manually configured. The problem with that is that on the initial boot, these modules cannot be used, likewise, every time the CMOS is cleared, there will be another POST failure. Remedies for this situation have bordered the bizarre as manufacturers had to offer a re-flash of the SPD of premium-priced low latency modules to work at high-latency settings (e.g. Corsair). In other cases, the suggested workaround was to buy one really cheap DIMM just to be able to POST and to enter the BIOS. Other vendors simply use an RMA with a hefty restocking fee in excess of their actual profit margins.

Please keep in mind that one cannot blame the memory manufacturers for the situation since in most cases it is problems with the mainboard BIOS that cause the problems. One other example worth mentioning in this respect is the BIOS corruption that can occur when low latency-programmed modules are being used on nForce2 chipset-based boards. As it turns out, the only workaround is really to program the modules to initially come up at high latency settings with the understanding that the targeted clientele should be savvy enough to be able to manually set the timing parameters to the appropriate settings. The consequence is, of course, a conflict between the marketing people and those who do the support.

From the above, it should be evident that relaxed latency programming of the SPD is not a matter of incompetence of the vendor or the modules but rather a safety precaution for both the manufacturer and the customer. Low latency SPDs are nice, where they are applicable but since the majority of boards still does not execute SPD parameters correctly, it is often a matter of luck whether the modules will work. Moreover, since even Intel's house brand boards lately offer manual latency settings, there is not even a point of pushing low latency programming aside from marketing purposes.

After this, er, somewhat long preamble, it is time to meet today's candidates. The TwinMOS modules were supplied by TwinMOS, everything else was either purchased separately or scavenged from other review kits. Kingston flat out refused to supply us with test samples, other manufacturers urged us to only say positive things about their modules ...... end of story right there. So what is left after weeding out the chaff are modules from "TwinMOS", "KingMax", "Mushkin", "Corsair" and "Samsung Original" and we'll put those through the paces. For the record, we did not ask Crucial and it is only because of our own negligence but this is what happens at the end of a review: the sudden "Oops, I forgot".

next page:    => In Alphabetical Order: Corsair ..... TwinMOS =>