Navigate:

Advice
Beginners
BIOS Guide
CPUs
Links
Mainboards
Memory
Network
Storage
Video/Sound Cards

Contact
Forum
SiteMap
Sponsors
WebNews
Home

. .


CPU
Intel
P4 840 D
P4 820 D
P4 630
P4 640
P4 650
P4 660
P4 670

AMD
Athlon64
3500+
3700+
3800+
4000+
X2-3800+
X2-4200+
X2-4400+
X2-4600+
X2-4800+

1-Way Opteron
Opteron 144
Opteron 146
Opteron 148
Opteron 150
Opteron 152

2-Way Opteron
Opteron 240
Opteron 242
Opteron 244
Opteron 246
Opteron 248
Opteron 250
Opteron 252

2-Way Dual Core Opteron
Opteron 270
Opteron 275

nVidia
GF 7800GT
GF 6800GT
GF 6600GT

ATI
R X850 XT PE
R X850 XT
R X800 XT PE
R X800 XT
R X800 XL

Memory

Corsair
Crucial
Kingston
Mushkin
OCZ

What are you
shopping for?







































































LOSTCIRCUITS

SHORTCUTS:
Top page
Clocking Strategies
OCD-Calibration
On-Die-Termination
Posted CAS-Additive Latency
All At One Glance
The Grand Picture
Winners And Not-So-Winners

Your Comments?

 DDR II   
A Technology Overview
Article by MS, January 6, 2003
updated last: Nov. 28, 2006


On Die Termination (ODT)

Any pulse or signal propagating along a bus will reflect from any part that is different. This lapidary statement implies that as long as the bus traces are homogeneous and of infinite length, no signal reflection will occur. Such a bus would, however, be useless, because it would not have any target. Any target would be different by definition and, thus, cause signal reflections one way or another. Depending on the signal strength, and the ratio between the actual signal and the reflected mirror image, the two signals may cancel each other out or cause some other interferences. Therefore, it is mandatory to keep any reflections as small as possible.

The technical solution is termination of the signal, meaning that at the end of the signal path, a resistor to ground, VSS or VTT, depending on which nomenclature is used will simply swallow the signaling voltage which, therefore cannot be reflected. A termination resistor is comparable to a black hole where everything is going in but nothing is coming back out.

Classical mainboard termination of signal to eliminate reflections compared to on die termination (ODT). Shown is only the data bus, however, ODT can be activated for the clock forwarding strobes (DQS. /DQS) and the write data masks (DQM) as well, depending on the scheme selected by the controller.

Of course, there are risks associated with overly effective termination, that is, the signal can be absorbed without reaching the target, simply because the resistance of the terminator is too low. Therefore, termination resistor values are usually defined within very narrow margins.

In the case of DDR memory, we have repeatedly pointed out the location of the resistors that are usually aligned in a row parallel to and on the far side of the DIMM slots. The position can vary but that depends mostly on the trace routing on the mainboard. We have also shown on occasion that changing the value of the termination resistors, even within the specs allowed by the chipset manufacturer can result in different performance / overclocking characteristics of the system from one board revision to the next.

It is important to realize that signal reflection will only affect active components within the system. Even though this point is trivial, another trivia is that reflections will occur on active and non-active component interfaces. The current scheme of mainboard-based termination will absorb reflections at the end of the traces, however, reflections caused at the I/O interface to the memory chips will have to re-enter the bus first before they can be terminated. In other words, there is a constant noise level on the bus that will interfere with the data signals and cause quality degradation.

The elegant way out of this dilemma is to use what is called On-Die-Termination or ODT by adding a current sink to ground on the die itself. In order to preserve signal strength on the active bank, it is best to add a switch to turn off ODT simultaneously with enabling chip select. This way, all chips that are not selected for data I/O, that is, those that are in active standby mode will have ODT switched On to eliminate reflection where it originates, that is, at the bus to die interface. As a result, there is no possibility for the reflections to reenter the bus and contaminate the real signals. ODT can be used for the data I/O bus, the clock forwarding strobes and the write data masks (DQM) independent of each other as specified by the controller.

next page:    => Posted CAS, Additive Latencies and Variable Write Latency =>

If you enjoyed reading this article and found it useful, please consider making a small donation to LostCircuits.
Thank you!

General disclaimer: This page only reflects the author's personal opinion and assumes no responsibility whatsoever regarding any of the contents or any damages that may occur explicitly or implicitly from reading the contents of this site. All names and trademarks mentioned in this review are the exclusive property of the respective parent companies.
All contents of this site are protected by international copyright laws. Reproduction of the contents even in parts is not allowed except after written permission by the author and referral to this site.
Copyright 1998 - 2007 LostCircuits