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DDR II 400, 533, The Stillborn Twins?

To make a long story short, there is a sudden, renewed interest at Intel in pushing DDR I to mainstream DDR400 and beyond, which looks like somebody finally did their homework. New speed bins on the DDR I roadmap encompass DDR I 533 which makes DDR II 400 and 533 obsolete products before they even hit the market and only leave DDR II 667 as marketable solution. Technical realization of DDR I 533 may require borrowing from DDR II some features like ODT to provide cleaner signals.

Aggravating for a potential move towards DDR II in this situation is the fact that DDR I took longer than expected to conquer the market, meaning that the industry is reluctant to abandon the current design in favor of yet another form factor. This is a very valid consideration, especially in view of the performance drawbacks with DDR II and the fact that DDR I turned out to be much better than what it was originally designed for (PC2100).

Some Of Them Will Sing The Blues

Looking at the DRAM industry and the present offerings of DDR components we have to make the assumption that future success will not be something that can be pulled out of the magic hat like the white rabbit. Rather we have to assume that the manufacturers currently providing the highest performance discreets will be able to further extend their leading role into the realm of high speed DDR I and also profit from their technological leadership. Currently, the top performer is Winbond with their almost unchallenged -5 parts that have been shown to run up to 500 MHz data rate already on a DIMM. Second in line is Mosel Vitelic with their DDR400 components that currently don't reach the luxurious frequencies of Winbond chips but excel at low latency operation beyond 400 MHz data rate.

Next down are the Koreans, with both Samsung and Hynix offering solid DDR 400-capable product even though the current D-revision of Samsung chip still cannot close the gap to the almost legendary C-revision dies from a few months ago. Maybe it is time to rescussitate the old photo masks again. Hynix appears to have another Ace up their sleeve in the form of high density dies, we have not seen those yet so we will not give them serious consideration at this point. Elpida (for the record, they are not Korean but Japanese) is a somewhat unknown factor in the equation, we really don't know what their current capabilities are but we trust Inokai San and his staff to be on track.

Micron at this point has not been able to follow up on the success of their original PC2100 DDR chips, quite a few of which were capable of running up to 200/400 MHz on a DIMM. Moreover, according to the last IDF presentation, DDR400 yields are somewhat low which was one of the reasons for Micron to push DDR II.

Last not least, there is Infineon. Granted that they always spec their parts conservatively, we have yet to see any of their components that would run in PC3200 mode, chances are, though, that we just never got them. Still, most products listed on the Infineon website are DDR200 and 266 components with only a few sporadic offerings of DDR 333.

Between Intel And AMD

An interesting tidbit on the side is that Intel's P4 architecture, using all kinds of optimizations, including hardware-based dynamic speculative precomputing for branch-prediction and prefetching will be hurt less than AMD by the high latencies of DDR II. To spin this a bit further, the main advantage of AMD's Hammer architecture is the integration of the memory controller onto the CPU with the goal of reducing chipset-related (control and address decode) latencies. It only requires second grade math skills to see that shaving off one cycle out of nine (1/9) on the controller level for an initial access will yield less performance gain than reducing latencies by one cycle out of five (1/5) .

The difference between AMD and Intel, though, is that Intel is actively participating in defining (say: "bullying") the memory specifications of the future regardless of the cost concerns of the DRAMurai. AMD, on the other hand, whenever we asked them, appeared to be mostly concerned with staying mainstream and swallowing whatever was served by the DRAM makers as the best roadmap. Clearly, with helping the memory industry to make the cheapest possible DRAM, AMD will not win performance or market share. Intel has learned this lesson many years ago, and even though Rambus faltered in the end, Intel got more mileage out of them than anybody will ever admit. VIA Technologies are pursuing QBM (quad band memory, invented and heralded by Kentron) with high bandwidth and low latencies, and where is AMD?

Realistically, there is a solution for AMD. Low latency processors and controllers require low latency memory. It is as easy as that and we ........ well, we do have some suggestions.

(to be continued some two years down the road)

Update

In June 2006, AMD finally took the plunge and released the AM2 platform with support for DDR2 memory. The new socket interface is another iteration of a Socket 940. The move to DDR2 was facilitiated by the release of DDR2-800 at 4:4:4 latencies, which effectively provides the same access times as a PC3200 DDR(1) running at 2:2:2. Moreover, DDR2 puts less load on the address and control buses and supports higher density components, so that the current mainstream modules are boasting 1 GB module density divided over 2 ranks. High-end DDR2 modules are currently pushing 1200 MHz data rates at 5:5:5 latency settings and are offered by OCZ Technology and Corsair.

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