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| Latency vs. Bandwidth, a performance analysis Life Beyond 150 MHz | |
| (Review by MS, August 15, 2000) |
Summary
We have evaluated the impact of DRAM latency and memory bus frequency on bandwidth and gaming performance in a step by step performance evaluation from 100 to 166 MHz memory bus frequency with varying latency settings. All benchmarks were run at a constant 1 GHz processor clock speed which allowed us to eliminate influence of different processor power and to directly evaluate the impact of memory operating frequency and latency on the overall system performance. We focus on 3D applications in order to bypass the usage of the integrated L1 and L2 cache. As platform, we chose the Intel i815 chipset based ASUS CUSL2 and an unlocked Intel Pentium III Coppermine processor. Our results show that stepping up from a 100 MHz (3:3:3) memory bus to 166 MHz (2:3:2) yields 78% and 89% measured enhancement in CPU and FPU memory bandwidth, respectively, translating into 22.2% higher system performance (frame rates). The current report concludes that, as memory bandwidth increases, latencies become the limiting factor in overall system performance. The performance increase gained, compared to 100 MHz ( 3:3:3) rates equivalent to increasing the CPU speed by about 400 MHz.
Intel recently showed in an internal study that, even within specs, the PC133 interface provides performance at least equivalent to the Rambus design. The emphasis here is on running within specs. That means that in an official white paper, apples need to be compared to apples. A twist of this situation is that Rambus is not an interface that is friendly to overclockers, on the other hand, the standard SDRAM interface has evolved to a degree where system bus frequencies in excess of 150 MHz are no longer impossible. It is established, though, that increasing the system and particularly the memory bus speed are proven methods to enhance the overall system performance, especially in view of the system RAM-to-CPU bandwidth limitation. These considerations are of increasing importance, not only with regard to overclockers but are becoming extremely relevant issues with respect to platform evaluations that, in essence, are the basis for the future roadmaps with chipset and processor manufacturers alike. Thus far, there have been speculations, models and estimates, however, a detailed performance evaluation needs yet to be published.
How much does the performance really depend on the system memory bus frequency and latencies? Within specs, this question is easy to answer with several current chipsets where the DRAM-to-CPU ratio can be selected within the BIOS. That is, at 133 MHz front side bus (or rather external CPU speed), both VIA 133A and Intel i815 chipsets offer the possibility of running the memory bus at either 100 or 133 MHz without changing any of the other system parameters as PCI or AGP speed.
When going beyond these standard settings, probably the most crucial problem is to maintain a constant clock speed. This is of utmost importance, since otherwise the clock speed delta would mask the change in performance caused by the parameters we are actually interested in: bandwidth and latency.
Under overclocked conditions, the situation is even getting a bit more complicated since every increase of the external CPU speed also causes a proportional increase in the PCI and AGP bus. Thus, the performance gain can no longer be solely attributed to the increase memory data transfer caused by a higher operating frequency. There is no way to eliminate this factor, however, for latency issues the impact of PCI and AGP bus is non-existent.
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