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Summary

Memory frequencies are spiraling upward faster than their own speed. New secret ingredients and buzz words are the latest boom, regardless of whether there is any supporting hardware to it. Enhanced Latency, Twin Pack, Extended Voltage Protection, Wafer-based packaging are just a few of the new features that belong into Glittertown. And then there are "Gold" heatspreaders, proprietary ICs at lightning speed and way faster than what any of the DRAM manufacturers produce.

We went out and bought the OCZ PC3700 256 MB EL DDR Dual Gold CH. Then, once again, we did the "Frank Perdue" and took it all off, skinless, boneless at its juiciest.

Memory speed grades have skyrocketed over the past year. Chipsets with support for DDR400 or PC3200 memory have been around since the SIS645(DX) system logic for the Intel P4 chipset, offering pseudo-syncromous modes of operation that, in conjunction with some overclocking, for the first time posed a real challenge for the memory industry. Samsung's third generation 256 Mbit DDR components, by now known as the legendary "C" revision, was able to push some solid 250 MHz clock rate or, in current parlance, DDR500 or PC4000 DDR.

OCZ PC3700 256MB EL DDR Gold Dual CH in a clamshell. We'll strip it all the way down later

The next die shrink to the "D" revision made the components cheaper to manufacture but at the same time, destroyed the dreams of many overclockers. Since then, the quest has been for better and faster discreets, capable of running at lower latencies and lower voltages to reduce thermal dissipation and, more importantly, power draw in high density system configurations.

A generally applied measure towards higher frequencies is to shrink the die. Smaller dies are inherently faster than larger dies. However, shrinking memory is not as easy as simply migrating to a new process, the core transistors and capacitors don't shrink as well as the core logic components and neither one follows the same rules as the I/O parts. In the past, this has led to a split voltage design with the I/O voltage (VDDQ) running unattenuated to the I/O pads and buffers, whereas the core used internal power supply to lower the voltage to an adequate level, typically 1.8V. Depending on the quality of the voltage regulators, increases in the external voltage will either be converted into heat or else, proportionally propagated to the core. In most cases, however, only the I/O buffers will be exposed to the higher voltage.

Higher voltage, in turn, makes the I/O buffers wiggle a little faster, at least within a moderate range as defined by the manufacturer's specifications for minimum and maximum voltages. Above that, the higher voltage differential between core and I/O areas will add more stress on the insulation and potentially also conflict with the overall design rules of the layout. Needless to say that the extra voltage will also be converted into additional heat with all the negative aspects of temperature derating, meaning that the chips will become slower instead of faster.

Before we go into the specifics of the individual memory modules, we'll give a quick breakdown of the parameters that are important, how they interact with each other and how they are (ab)used by module assemblers to hype their products.

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