Navigate: Advice Beginners BIOS Guide CPUs Links Mainboards Memory Network Storage Video/Sound Cards Contact Forum SiteMap Sponsors WebNews Home	.	.
CPU Intel P4 840 D P4 820 D P4 630 P4 640 P4 650 P4 660 P4 670 AMD Athlon64 3500+ 3700+ 3800+ 4000+ X2-3800+ X2-4200+ X2-4400+ X2-4600+ X2-4800+ 1-Way Opteron Opteron 144 Opteron 146 Opteron 148 Opteron 150 Opteron 152 2-Way Opteron Opteron 240 Opteron 242 Opteron 244 Opteron 246 Opteron 248 Opteron 250 Opteron 252 2-Way Dual Core Opteron Opteron 270 Opteron 275 nVidia GF 7800GT GF 6800GT GF 6600GT ATI R X850 XT PE R X850 XT R X800 XT PE R X800 XT R X800 XL Memory Corsair Crucial Kingston Mushkin OCZ What are you shopping for?

LC: Back to the technology: How does ZRAM compare to other, currently used memory technologies with respect to footprint, access time, cycle time and last but not least power consumption. Of particular interest is the power question here, if there are no dedicated capacitive structures, power consumption profiles will certainly be very different from anything we know. The same goes for the input capacitance/impedance of each "memory cell". Any comments on that?

J.L.: I can give you some general answers here. Footprint, and that is our primary benefit: we are 2x denser than embedded DRAM (“eDRAM”) and 5x denser than embedded SRAM. The performance attributes (speed and power) can vary – Z-RAM memories can built across a pretty wide range of performance ranges. Generally, Z-RAM is faster than eDRAM and not quite the speed of eSRAM – although SRAM speed tends to degrade as macros get large, and, since our macros are physically much smaller, we don’t have nearly the same degradation. Power consumption profiles are different than eDRAM, and certainly SRAM, but we don’t generally disclose that except under NDA.

Illustration from: Zero Capacitor Embedded Memory Technology addresses dual requirements of die size and scalability
(Dr. Pierre Fazan, CTO, Innovative Silicon)

LC: The licensing agreement with AMD means a great for ISi. As far as I understand, the fundamental prerequisite for building Z-RAM is the use of silicon-on-insulator. This, of course, makes AMD the prime partner for a general implementation of z-RAM on their processors. AMD, though, is not the only company out there using SOI, in fact, IBM was the company to pioneer SOI. What I am getting at is whether one might see IBM at some point amongst the licensees as well?

J.L.: You are correct that SOI is a fundamental technological underpinning of Z-RAM. There are some major companies using SOI, so, naturally, those are the kinds of companies we are talking to. One point to note is that AMD is an SOI semiconductor process partner with IBM – they recently announced their partnership extended to 45nm and beyond. But, of course, I can’t disclose any kind of partner relationship until it becomes, well, disclosed.

LC: The other big trend in the memory industry has been the migration towards multi-sensing memory cells that are capable of storing more than one bit value using different voltage rails. Will we see anything like that on Z-RAM. It appears as if the technology would be predestined to enable such a feature, for example by multivoltage rails?

J.L.: Multi-bit storage is indeed an exciting technology because it provides even further density improvements – witness companies like Saifun, who recently (and very successfully) went public. It is of great interest to us, but, again, we have nothing to disclose at this point.

LC: Last no least, many great technologies have never become mainstream for the simple reason that the manufacturing of the devices was extremely difficult. This could be a severe handicap for SRAM replacements, particularly since it is known that the trench capacitor manufacturing process is averse to the standard CMOS manufacturing process and vice versa. If I understood you correctly, Z-RAM does not face these challenges. It kind of makes sense since it does not use capacitors and, therefore, there is no need for VMOS process technology. In other words, it appears as if Z-RAM is a Deus ex machina solution for making combined logic- memory devices on a single die. If that is true, do you anticipate that this will accelerate the acceptance rate of Z-RAM in intelligent memories (containing logic) or else bring additional cache levels to processors as we currently know them?

J.L.: You are absolutely correct that SRAM and DRAM scaling is getting more difficult with each new node. SRAMs have problems with Soft Error susceptibility and leakage. Even worse is the problem with embedded DRAM - it is getting harder and harder to shrink the capacitor. Deep trench capacitors are difficult for CMOS and impossible for SOI; while the materials and processing for stacked capacitors gets more exotic at each node. Z-RAM works with the native process with no changes, and we do not see any problems with scaling for the foreseeable future – the memory cell will continue to shrink with the process. So you are right that Z-RAM is the ultimate solution for combined logic-memory devices. In the past, you ended-up with an inefficient memory on a logic process, or very slow logic on a memory process. With Z-RAM and SOI, you get the best of each.

Next Page:    => More Memory Articles =>