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 ASUS A7M266 (AMD761 North Bridge VIA 686B South Bridge)
DDR lives!!! (Review by MS)
top page | specs | features, quality | layout, hazardous voltages | BIOS | setup, stability, overclocking and voltage effects | performance | gaming | conclusion


BIOS

I mentioned a few times already the Award Medallion BIOS used by ASUS for the last year. A welcome difference from the standard BIOS layout, the Medallion revision is also custom tailored around the individual boards and, for most cases, does not contain any superfluous settings. The current version follows this line, however, with a few exceptions.

As always, the most important part is the Advanced Options Menu containing all the hidden goodies.


Operating Frequency Setting

In order to access this field, the system needs to be set to jumperfree. Depending on the CPU used (100 / 133 MHz bus), the options include either 100 MHz or both options, in addition to the User Defined setting. In order to manipulate any of the further settings, it is necessary to select User Defined.

CPU Clock Multiplier

Needless to say that an unlocked Athlon is needed, otherwise the field will be greyed out. In the current BIOS revisions, even an unlocked Thunderbird cannot be multiplier adjusted, however, according to ASUS, one of the next BIOS revisions will address this problem. Sorry if this was stated somewhat misleading before.

Set System Operating Frequency

This is by far the most important setting. The implementation allows for increments / decrements in 1MHz steps at a time, courtesy of the linear programmable ICS 94225 clock. Despite the fact that going one step a time is a bit tedious, it actually makes sense to force a slow progression into uncharted speed domains. The only drawback is that, upon a no-boot with the result of defaulting back to safe settings, the entire procedure has to be repeated. One should still consider this a part of the educational process, though.

Once the system operating frequency has been increased / decreased, the changes are reflected in the next field: System Frequency. Please keep in mind that all these options are only available in jumperfree mode.

CHIP Configuration

SuperBypass

The SuperBypass is a reduced latency operating mode of the memory request organizer, capable of increasing the overall memory bandwidth by some 25%, at least in the AMD751 chipset. An additional entry allows to enable / disable wait states, however, there was no performance difference seen when changing the latter.

Memory Timing Settings

As usual, the memory timing settings are accessible in the CHIP Configuration subpage. Accessible fields include CAS latency (2; 2.5T), RAS-To-CAS Delay (2; 3T) and RAS Precharge (2; 3T). Interestingly, though, despite the fact that the settings can be changed if the SDRAM configuration entry is set to User Define, there was no difference noted in any real world benchmarks. SiSoft Sandra confirmed this impression, that is regardless of how any of the individual timing parameters were set, all memory benchmarks came out with the identical results

Regardless of the memory timing settings, all SiSoft Sandra memory benchmark results came out identical. Numbers shown are reesults with VIO1 jumper removed (2.5V). If the default jumper setting was restored (2.8V), bandwidth dropped by 1.6 and 1.5%, respectively, to 565 (ALU) and 729 (FPU) caused by heat-induced performance derating at the higher voltage.

This is quite interesting since this is the very first time that ASUS has BIOS settings that really don't do anything and are just display items. Actually, this is not entirely true, since the SPD information is displayed in the respective fields. Of course, it is a circular argument since the DDR specs call for 2:2:2 timing settings in PC1600 mode and 2.5:3:3 in PC2100 mode, at least with the current generation of part.

Interestingly, in the System Summary DOS screen following the POST display, the DRAM operating mode is shown as either PC1600 or PC2100, depending on the FSB frequency. What it all boils down to is that at 100 MHz and its derivatives running at the 1/3 PCI divider, the memory bus is operating in 2:2:2 mode, as soon as a 133 MHz CPU is identified, the PCI divider switches to ¼ and drags the memory timings to 2.5:3:3. In view of the rather confusing options offered by the AMD761 North Bridge, masking the individual entries appears to be the best decision at the time since not everyone reads LostCircuits and even plagiarism takes awhile to propagate the relevant information. The only drawback is that there is a minority of DIMMs out there using spin-offs of graphics DDR chips with the characteristic short output hold time. Those chips do run into problems at the higher CAS latency, regardless of frequency, because their data could expire before the Data Valid Window is initiated after the CAS delay.

IRQ Routing

Courtesy of the ASUS ASIC, each PCI slot can be assigned to a specific IRQ with PCI slots 4/5 sharing the same. Please make sure that PnP OS installed is enabled to make use of the hardware IRQ management of the ASIC.

=> test configuration, overclocking and the strange behavior of DIMMs =>
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