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| ASUS A7N266E Chipset Wars | ||
| (Review by MS, February 18, 2002) |
Jumperless technology has come a long way, still, as we outlined in the review of the ASUS P4B266, there are enough situations where a hard-wired jumper setup is preferable. The A7n266 features quite a few jumpers and some are worth looking at, particularly, since there is a tendency at ASUS to set some jumpers differently from what the manual describes as the default setting. Of particular relevance here is the VDDR (DDR memory voltage) setting that can be adjusted from 2.5 over 2.6 to 2.7V. Our own measurements showed an average of 0.022 V above the documented specs, which is well within the tolerances. Other jumpers include the USB power-on enable and the Clear CMOS jumper.
As usual, there is the JEN (jumperless-enable jumper) that activates the Soft BIOS or else the BSEL0 / BSEL1 jumpers to manually set the FSB / DRAM frequency and ratio with all possible combinations of 100 and 133 MHz settings. Independent of the JEN jumper is further the CPU voltage setting jumper block to allow settings from 1.675 to 1.85V, depending on the type of CPU used. Other jumpers are for clearing the CMOS as well as for enabling USB Power-Up.
One noteworthy feature of the A7N266E is the absence of the sound connector in the ocre-colored ATX Sound I/O block which features only a gameport interface. This separation of function between actual sound and gameport functionality is made necessary by the ACR. Otherwise, the A7N266E features the standard connectors from chassis intrusion and SMBus over infrared and two USB ports to the powersupply temperature monitoring header.
BIOS
Like in all recent mainboards from ASUS, the BIOS is the Award Medallion and very organized into logical blocks rather doing the shotgun approach we have seen in some V6.00PG versions or, to that effect, AMI BIOS in the past. Since there board features the integrated graphics controller, there are some deviations in the configuration of the CHIP Configuration sub menu to accommodate the necessary adjustments, e.g. the size of the dedicated VGA memory can be specified. In addition, the Advanced menu has the option of "Integrated Graphics Overclocking" which doesn't do very much as we will show later.
FSB Adjustments at Fixed PCI Frequency
The key problem with overclocking is no longer the stability of the memory or CPU but rather the fixed ratio of the PCI bus. At a 1/4 divider, the highest "safe" setting for long term use is around 150 MHz which pushes the PCI and IDE bus up to 37.5 MHz. Sure enough, there is no problem exceeding this frequency for a short period of time but in the long run, the wear and tear, especially on the HDD is not to be underestimated and considering the hassles of a dead drive, there is really no performance gain that could compensate for the loss of data in a case like this.
The A7N266E BIOS allows to adjust the FSB from 100 MHz to 172 MHz in roughly 2 MHz steps, however, the PCI frequency remains fixed at 33 MHz making any overclocking approach a relatively save enterprise. If the system crashes, it crashes, there may ba a registry corruption because of insufficient margins of the memory but at least there won't be any dead drives. This adds a whole new definition to the word Overclocking.
There are a few points in the BIOS, though, that I personally did not like too much.
No Vre adjustments in the BIOS
It is an omission but not really that grave since the Vre can be adjusted via jumpers on the board. In other words, it is more of a nuisance than a real flaw.
SDRAM CAS Latency
A total of six possible settings is available comprising combinations of Auto, 2.0 and 2.5 with the Normal and Turbo selection where the first set of entry defines the CAS latency whereas the Normal and Turbo appear to select tRCD, tRAS and tRP. There may be limitations in what is accessible in the original BIOS configuration defined by nVidia but it would have been nice to at least list the parameters changed.
Clock Spectrum Mode
This setting cannot be altered and is set to Center Spread, at least that's what the BIOS screen shows. In reality it does not look like there is any modulation going on since CPUID returned the same values for the clock speed every time. Likewise, SiSoft Sandra and other benchmark results did not show the fluctuation typical for SSM. Keep in mind that the only purpose of Spectrum Modulation is to induce an artifact for the FCC-used EMI control measurements in order to pass inspection and has no benefit other than to induce system instabilities under stress conditions.
Another point that has recently received some attention is the PCI latency, particularly in the context of IDE bus transfer. In the case of the A7N266E, the latency is set by default to 32 cycles which is almost a guarantee for low transfer rates. As we have stressed over the past 2 years, increasing the latency to a minimum of 64 cycles will increase PCI (IDE)-related performance without choking the bus. The adjustment is available in 1 bus cycle steps.
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