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Some things to ponder
The most prevalent impression after playing around with the ASUS CUV266 is the insane capability for overclocking this board. However, it is not just the mainboard but, an equally and particularly stunning finding was that the memory used was holding up with ease the challenges of the high interface frequencies. As a sneak preview, I have tested more than just the Mushkin DIMMs on the CUV266 and all of them, by far exceeded the expectations but I am waiting for a few more samples to finish up a complete round-up.
To get back on track here, we were talking about the chipset and DDR memory being able to meet or exceed the PC2700 specs about 9 months ahead of schedule, add the well-known delay in the industry and we are over one year faster than we are supposed to be. How is this possible? Even though there are several factors that could play into the overclocking capabilities, the most important issue probably relates to the clock forwarding traces mentioned in the beginning of the review. So what's behind this story?
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SDRAM and the Trace Delay
It is easiest to explain by looking back at the obsolete SDRAM technology. What does CAS-2 mean? CAS-2 means that the chipset issues a read command and on the second rising edge of the clock, the data have to be ready to be output from the SDRAM DIMMs. So far so good but there is only one system clock that simultaneously addresses all peripherals.
This, in turn means that, if the memory controller issues the read command on a clock boundary, the same command will reach the memory a few ns later. At 100 MHz, this may not have too much impact, since this "setup time" of ca.2 ns is still only about 10% of the overall CAS latency, that is, the time until data output starts. In other words, at 100 MHz, a CAS-2 DIMM has roughly 18 ns to prepare the data for output.
If we are looking at 166 MHz bus speed, the each clock cycle (tCK) is only 6 ns. Take a CAS-2 part again and the chips have to be ready to start data output after 2 x tCK - setup time (2 ns) but this time, the CAS has to work within 10 ns.
DDR and clock forwarding
The difference in the DDR platform is subtle but very important. DDR uses a clock forwarding signal. That is, instead of an independent timer, the strobe signal is forwarded with the command bus and for a CAS-2 part, the data have to be ready at the second rising clock edge again. The key issue here is that there is no delay of the command with regard to the DIMM clock signal because they are bundled to each other.
What does this mean in real life? Looking again at 166 MHz (tCK=6 ns) a CAS-2 part needs to output data on the second rising clock edge after the command. However, in this case, the command arrives together with the clock, therefore, there is no delay that would shave off time. In other words, the CAS needs to be faster than 12 ns rather than faster than 10 ns in an SDRAM part.
Clock by Clock: SDRAM vs.DDR
What this all comes down to is that SDRAM DIMMs need to select rows and columns faster at a clock by clock comparison than a DDR DIMM. Going back to the 166 MHz memory frequency, by taking into account the advantage of the clock forwarding protocol and doing the math, a rough approximation is that a 166 MHz DDR DIMM needs to roughly as fast as a 143 MHz SDRAM DIMM. One hundred and forty three MHz, is, by now, almost a commodity speed, that is, even cheap standard parts can run at that frequency. Therefore, the high frequencies achieved are not as surprising as they originally seemed.
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