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We tested the P4S333 in the following configuration:

• ASUS P4S333
• Intel Pentium4 2.4 GHz
• 512 MB Level2 PC2100 DDR
• ASUS V8460 Ultra GeForce4600
• IBM GPX60 (20 GB)
• Pioneer 12x DVD-ROM
• SMC 9332BDT Etherpower

SiSoft Sandra 2002

SiSoft Sandra memory bandwidth benchmark offers two basically different modes of operation, "allowing buffering" enables prefetch mechanisms and, thus, true streaming of data through the memory path. We have known and written about this for quite awhile but here is the real challenge in the DDR environment. DDR allows early read commands, and therefore CAS latency can be completely hidden in streaming applications while at the same time tRCD will play only a subordinate role. Consequently, we do not expect much difference between scores run at "by SPD" and manually set 2:2:2 timing parameters.

Memory bandwidth as determined by SiSoft Sandra at either 2:2:2 timing settings or else "By SPD", which, in this case means 2.5:4:4. The red columns are the ALU bandwidth, whereas the bluish columns are the FPU memory bandwidth. Overall, the results are not too thrilling for a 166 MHz memory interface but keep in mind that we need synchronizers and fifos here for the translation of the different bus frequencies (memory bus vs. FSB) which add chipset internal latencies. The interesting part, however, is that adding latencies on the memory side of things does apparently have no impact on the performance whatsoever.

In a perfect world according to Intel, everybody would be just streaming data in and out with divine performance as a reward. Unfortunately, this divinity is still known by its perspiration rather than its inspiration since in real live applications performance is still a function of latencies rather than bandwidth. However, before even going there, let's just turn off prefetching and, without even going into random accesses, take another look at the bandwidth under the slightly changed conditions.

Memory bandwidth without prefetching. Keep in mind that we are still looking mostly at in-page accesses where the number of page misses is relatively low. However, without utilization of prefetch buffers on the chipset, latencies are becoming a rather prominent performance issue.

Keep in mind that this are just memory bandwidth scores that may or may not have a huge impact on real world performance. Let's, therefore, take a look at a simple gaming application: Expendable Timedemo that measures frame rates in the execution of a script where alternating reads writes probably a high number of page misses are the determining performance limitations:

The impact of latencies on frame rates in Expendable Timedemo is almost more dramatic than what we see in SiSoft Sandra.

Overclocked Memory Bandwidth

At 117 MHz FSB and 3:5 FSB:memory frequency ratio the memory bus is running at 194.5 MHz. True, we did not reach the 3200 MB/sec theoretically possible but 2700-plus MB/sec aren't too shabby either.

I think we can summarize the results shown on this page by saying that the high memory bus frequency gives a certain performance edge in streaming applications. However, latencies still rear their ugly heads and bandwidth cannot cover up for this problem.

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