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| Foxconn C51XEM2AA The Way nVidia was Meant to Be Built | |
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(Review by MS, July 17, 2006) |
| AMD Athlon64 x2-3800+ |
nForce 500 series Chipset Family Overview
The nForce 500 series of chipset comprises four different versions, starting with the nForce 550 at the bottom all the way up to the nForce 590 SLI as the flagship model. In short, the nForce 550 and 570 are monolithic solutions, meaning a single-chip integration of the entire core logic whereas the nForce 590 SLI is a dual chip design - which in the case of nVidia is, after all, the only way of integrating 32 PCIe lanes for SLI functionality.
The 570 series features both an Ultra and an SLI version, which is essentially the same division as in the phased-out nForce4 family of chipset. As in the latter, the key differentiator is the support for SLI that is accomplished by splitting the 16 lanes into two separate x8 connections. The SLI version supports 28 lanes and 6 links whereas the Ultra version contents itself with 20 lanes and 5 links.
Large Disk RAID
One intriguing feature of the nForce 570/590 MCP is the support for RAID 5 using up to 6 SATA drives. While RAID 5 is possible with as few as three drives, it really starts making sense only with a minimum of four drives and every single drive added to the array increases the efficiency of the distributed parity concept - however, it also adds complexity to the parity calculations necessary for writing data to the array. The 570/590 MCP allows for two different RAID 5 configurations, namely dividing the ports into 2 x 3 drives or else using a single large array with all drives in the system consolidated into a single RAID 5 configuration. Needless to say that RAID 0,1 and 0+1 are supported as well.
The 550 is the most plebeian version, geared primarily towards the mainstream user, supporting only four 3.0 GB/sec SATA drives (as opposed to six in the 570/590) and featuring only a single Gigabit Ethernet port instead of the dual solutions present on the other chipset revisions. Also, the RAID 5 functionality is missing from the nForce 550 MCP, supported, however, are RAID 0,1 and 0+1 (mirroring of a striped array).
Clockwise: nForce 550, nForce 570 Ultra, nForce 590 SLI, nForce 570 SLI chipset block diagrams.
Special nForce 590 Features
As mentioned earlier, the nForce 590 uses two separate ICs, similar to what was implemented in the nForce4 SLI 32. Consequently, the configuration can be described as a tunnel chip or SPP with primarily one 16 lanes PEG (PCIe-Graphics) link branching off and an MCP chip hanging at the back-end over the secondary HyperTransport link.
The primary reason for going with 32 PEG has been stressed as providing extra bandwidth to the graphics cards, For most current GPUs, providing more than the 8 GB/sec total bandwidth between both cards appears overkill, especially in view of the fact that this combined bandwidth is already in excess of the total system memory bandwidth and, more importantly, in excess of any data transfer the HyperTransport link is capable of. There is, however, the argument of the data transfer between the graphics cards and this is where, especially at high resolutions and antialiasing levels the extra bandwidth might provide some benefits. Realistically, though, because the two cards still need to talk to each other through the HyperTransport link connecting the SPP and the MCP, this argument still appears to reflect more wishful thinking than reality.
nVidia LinkBoost Technology
It is always nice to see new features, but sometimes it is necessary to take one step back and be just a little critical. nVidia's Boost technology is a new approach to further increase the bandwidth to the PEG interfaces. In short, with graphics cards that support LinkBoost, the PEG signaling frequency is automatically increased from 100 to 125 MHz - by extension, this increases the data bandwidth from 8 GB/sec/PEG link to 10 GB/sec or, in absolute numbers, from 16 to 20 GB/sec. Given the limitation of the HT interface between the cards and towards the CPU, it is not really clear what the practical value of this feature might be other than marketing hype but marketing is what drives sales. To be true, when LinkBoost is enabled, the SPP-MCP interconnect is also overclocked to allow 5 GB/sec data bandwidth in each direction. It is also necessary to keep in mind that the HT link is a full duplex interconnect with concurrent upstream and downstream traffic whereas the PCIe links are bi-directional, meaning that data can only go one way or the other at any given time.
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