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LOSTCIRCUITS	SHORTCUTS: A Tale of Two Chipsets At One Glance What You Get Layout / VRM Striping over Two Controllers Other Integrated Peripherals BIOS / SuperStep Test Configurations Benchmark Overview SiSoft Sandra WorldBench5 Cinebench 2003 Power Issues 3DRendering Power 3DGaming Power Overall Gaming Performance Final Words Comment on this review on the LC Forums
Foxconn Winfast NFPIK8AA-8KERS They Created a Monster ....
(Review by MS, Oct 16, 2005)

Gigabit Ethernet connectivity is established through two Vitesse VSC8201RX low power Phy layer ICs featuring all intelligent features one has to expect from such devices, such as automatic detection and correction of cable pair swaps for backward compatibility with older devices, internal timing compensation to accommodate different PCB designs, and a customized VeriPhy cable diagnostics software suite. Of particular importance for a potential use as file server is the support of 10 kB jumbo frames.

                    

The two Vitesse Gigabit Controllers; the first set of four SATA connectors, the second set of four SATA connectors, bird's eye view of the entire phalanx of chipset level-integrated SATA connectors.

ATA Connectivity, nV RAID and Cross-Controller Arrays

Storage devices are important factors of any computing systems and in the case of a server, storage technology is amongst the most important factors. In most advanced boards, we see a limited number of Advanced Technology Attachment connectors that are integrated on the chipset level, and additional connectivity is only offered based on a third party host bus adapter. The latter are usually tied into the system backbones through a dedicated PCI connection that needs an interrupt to arbitrate for the shared PCI bus. More recent solutions use a PCIe hookup that, in the case of a single lane interface at least warrants some 250 MB/sec bandwidth in full duplex mode. For "entry level" RAID solutions, this may suffice. However, the days of drives sustaining a meager 20 or 30 MB/sec sequential transfer rate are over, furthermore, insufficient bandwidth at the backend of the HBA can and will cause speed matching conditions in RAID configurations.

Therefore, full integration of RAID-capable host bus adapters into the chipset has become a mandatory feature, even in the case of "consumer-level" Serial ATA devices. Keep in mind that the SATA-2 specifications already call for burst transfers of 3Gbit/sec for a single drive, which is above and beyond a single lane PCIe connection. Now think about a configuration using potentially eight high speed SATA devices of the second generation. The only way of how this configuration could maintain functionality is by tapping directly into the backbone of the system bus by integration on the chipset level.

We tested high-level functionality of the nVRAID using six Fujitsu MT2060BH 2.5" Serial ATA "notebook" drives using a Level 0 +4 and +6 (striped over four and six drives respectively) in HDTach. The main focus of this test was to look at the sequential transfer rate, the burst rate and especially at whether we would see the type of jitter typical for an outrunning of the sequential transfer of the host transfer rate resulting in cache overflow and subsequent LBA miss known as speed matching condition. Because of the chipset-level integration, another aspect we looked into was the flexibility of the configuration, that is for example, whether it is possible to stripe across controllers and what would be the performance limitations in such a setup.

To make a long story short, there were no speed matching conditions, the controller interface appears to have enough bandwidth upstream even to handle sustained transfer rates of about 110 MB/sec and bursts around 215 MB/sec. There appeared to be no difference in performance when four drives were tied to the same controller or distributed across two controllers. On the other hand, it seemed as if the SATA RAID connection was limited to a single PCIe lane since adding two extra drive for a striping over 6 drives array did not increase the burst transfer rate in any way that could be considered scaling, likewise, the sustained sequential transfer rate capped at 110 MB/sec. Note that the capping could also be an issue with the algorithms used by HDTach, and in the spirit of never trusting a single benchmark we ran another one, that is SiSoft Sandra, which painted an entirely different picture.

      

      

Whether the four drives were connected to the same controller or striped over two controller did not make any difference in HDTach3.0. With 6 drives, the overall performance increased but still appeared to be below the level expected by simply multiplying the performance of a single drive by the number of devices. This appears, however, an issue more related to the testing software and the algorithms used than the capability of the hardware, since SiSoft Sandra paints an entirely different picture, placing the performance numbers right where we would expect them.

If we look at the numbers in Sandra, we see that the sequential transfers scale up to 178 MB sec (reads) which is close to the theoretical limit of the drives (~ 30 MB sec) in a striped over 6 drives configuration. Likewise, the burst transfers or cached / buffered reads are with 578 MB/sec beyond the memory transfer rates in a PC100 SDRAM configuration of the not so distant past. What the numbers are really telling us is that there does not appear to be a bottleneck in the system interconnect, the PCIe backbone has apparently enough bandwidth allocated to the RAID controller so that there is no upstream congestion of the data traffic even in "experimental" RAID configurations like the stripe array used and that, for obvious reasons is not anything that one would run in a system with even minimal data security requirements.

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