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To Lock or not to Lock that is here the question For the PCI bus, that is.
(Review by MS, Dec. 11, 2003)

ONE OF THE DIFFERENCES between the two main contenders in the Athlon64 arena, namely the nForce3-150 and the VIA K8T800 is that the VIA chipset derives its PCI bus by means of a 1/6 divider of the external CPU clock whereas rumor has it that the nForce3 chipset, similar to the nForce2 chipset has a frequency locked PCI bus. In turn, this is often used as an argument to explain the better overclockability of the nForce3 chipset.

There are different ways to prove one way or the other, one way is the use of a Geiger card with the caveat that this PCI card may not function correctly since it is used internally within the system. Honestly, we don't believe that this is a strong possibility. However, another, fool proof way to find out is the use of a high frequency oscilloscope to probe the clock input signal directly at the PCI slot.

We used the Shuttle AN50R nForce3 -150 based board to monitor the PCI input clock at different frequencies using a HewlettPackard HP54512B High Spee3d oscilloscope. Here is what we found:

      

At 200 MHz system clock, one PCI clock peak to peak interval equals exactly 30 ns, which corresponds to 33 MHz. At 222 MHz, the clock cycle time gets shorter, in fact, we measured 27.1 ns which corresponds to 36.9 MHz.

Our measurements clearly show that, also on the nForce3 chipset, the PCI bus frequency is directly derived from the system clock by means of a divider. That still does not answer the question whether all peripherals as, e.g. onboard SATA controllers will propagate the same overclocking to the drive. In fact, the presence of a separate quartz directly adjacent to the controllers on most boards we have looked at, suggests otherwise but the frequencies were out of range for our measurements.

Special Thanks to Kevin and John at Astek for letting me use the scope.

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