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LOSTCIRCUITS

SHORTCUTS:
RADEON 9000Pro
R300 At One Glance
Transistors, Power, Quad Memory Controller
AGP X8, Vertex Shaders
HYPER Z III
Floating Poing Pixel Engines
Dyanmics of Light and Pipelines
Bump mapping instead of modeling
Anti Aliasing
Hairy Edges
Multiple Render Targets, Monkeys and Epitaph

Hot Offers for the FireGL

 ATI RADEON 9000 / 9700
No Paper Tigers
(Review by MS, July 20, 2002)

Unlimited Dynamics

Compared to the capability of the Human eye to resolve approximately 7-10 million colors, the 16,7 million colors possible with 32 bit integer RGBA color would appear sufficient to generate cinemascopic photorealism. The real world, however also spans over a dynamic range of 6 log units, that is 1 million brightness levels and this is where the main limitation of 32 bit color as we know it comes into play; 32 bit color as mentioned above only generates 256 grey-levels. The 128 bit FPU pipeline of the R300, on the other hand, creates billions of grey-levels necessary for rendering of photorealistic scenes.

The left half is rendered in 32 bit color, the right using 128 bit FPU color. The left half preserves the structures in an unnatural way and has washed-out colors whereas the right half shows photorealistic "brightness blur" that outshines the contours of the balls.

DX9 Features and Pipeline Dynamics / Limitations

The DX9 compliant pixel shaders are the next generation of pixel shaders as we know them from DX8. DX8, uses 12, DX 8.1 uses 16 pixel shader instructions and DX9 finally boasts a full 64 instructions. The R300 Pixel shaders are capable of execution of all 64 pixel shader instructions in a single pass before the data need to be written back to the frame buffer. To be clear on this issue, the ATI presentation contained two sets of number, one referring to the full instruction set of DX9 (64) and the second referring to simple addess, scalar or vector instructions. In case the latter are referred to, the number of instructions per pass can be as high as 160.

The technique is rather simple, a buffer at the beginning of the pipeline can hold all 64 DX9 instructions that can be called and, one by one pushed through the pipeline to modify a single pixel (if they are called). Keep in mind that one pass encompasses several clock cycles until all executions have been carried out by the pipeline. The combined power of the pipeline and DX9 instructions allows for as many as 16 textures that can be mapped on a pixel in one single pass.

After each pass, the full precision of the 128-bit floating point pixel value is written back to the frame buffer, meaning that it is necessary to read the value out again, should further texture modifications become necessary. Theoretically, this could be a drawback compared to rumors about the next nVidia GPU architecture featuring a register at the end of the pipeline which enables the architecture to loop the pixel value through the pipeline without intermediate writing back to the LFB.

Realistically, however, the R300 will hardly ever have to resort to any multipass operation since we already know that a total of 16 textures can be added per pass even though we don't know how many loops this may involve. Typical next generation games like Doom 3 only use 4-6 textures per pixel, in other words, the R300 still has 300-400% headroom. Even if the values have to be read again from the LFB, they will still have preserved the full 128 bit floating point precision generated by the pixel engine. In addition, a single burst read out of the LFB is not as fast a direct loop but the performance hit will be somewhat acceptable, especially in the high-end CAD and rendering applications that may need this procedural complexity.

Next Page:    => 128-bit Monitors? The Truth in the Bump =>

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