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LOSTCIRCUITS

SHORTCUTS:
RADEON 9800 Pro
F-Buffer
Specs
Features / Overclocking
Test Configuration
3DMark2001SE-I
3DMark2001SE-II
3DMark2001SE-III
3DMark2003
Codecreatures => VillageMark
ChameleonMark
Conclusion

Your Comments?

Find the Best Deal on the RADEON 9800

 ATI RADEON 9800
Power to the F-Buffer (what else is new?)
(Review by MS, July 18, 2003)

One of the most severe limitations of the R300 architecture, at least on paper, has been the limitation of 64 pixel shader instructions as opposed to the seemingly unlimited number of instructions that can be handled by the GeForce FX class of GPUs. What does that really mean? In most scenarios, 64 instructions for the pixel shaders will more than suffice to generate any effect desired by the 3D artist. Yet, the trend is (thank you!) moving more and more towards cinematic quality, even in games, and that requires complete simulation of a plethora of environmental factors. Not only that but it also requires that all those processes are absolved in real time. Real time processing, in turn means that everything has to be done as fast and as efficient as possible and this is where the main novelty of the R350 GPU comes into play: the F-buffer.


Before going on, I wish to give some credit to Scott Wasson since we discussed quite a bit of this over lunch at the RADEON 9700 Pro Launch-Event.

The Limitations of Limited Instructions

By its own nature, each instruction can only change one parameter at the time, if multiple parameters are supposed to be changed, multiple instructions need to be issued. The DX9 instruction set contains a total of 64 instructions that can written to an instruction buffer at the beginning of the pixel pipeline and then sequentially run down the pipeline to modify a given pixel. In most games, there are no worries about running out of instructions since the 64 instructions already allow for no less than 16 textures. If more textures are required, the data will have to be written back to the frame buffer and then read out again for further processing.

This practice has a number of problems associated with it as spelled out in detail by Mark and Proudfoot in their original description of what they called an F-Buffer: Rasterization-Order FIFO Buffer for Multipass Rendering

All in all, if intermediate writes and subsequent reads are necessary to either the LFB or else to the texture memory on the system, this movement of data will require a huge amount of bandwidth that is simply wasted. This is where the Mark and Proudfoot invention comes in by adding what might be described as a circular buffer in the form of a first in - first out pipeline or FIFO, which is about the simplest form of an intermediate storage buffer since it works essentially like a garden hose. That is, at the end of the pixel pipeline, the intermediate data come out, go into the "intake" of the FIFO and are moved to the FIFO output, which brings them back to the beginning of the pixel pipeline for the next pass.

Aside from bandwidth considerations, there is also a benefit for color precision since there is no intermediate blending of fore and background pixels that is necessary before writing the data to the frame buffer. Again, Scott put it together nicely here.

In light of the technology, it is somewhat disappointing that there are no applications yet to take advantage of the possibilities, at least not in the area of consumer graphics and gaming. It is also very unlikely that we will see any games that will require or take advantage of the F-buffer during the lifespan of the R350.

The situation is certainly different when it comes down to cinematic rendering and generation of special effects. This domain has fallen into the hands of nVidia in the last few years, simply because of the incredible performance of the Quadro cards that have made the lives of even high-end manufacturers such as 3DLabs pretty miserable.

Here the name of the game is performance AND accuracy and while gamers are drooling over frame rates, the same differences mean hard cash in the professional graphics market. The reason is that most of the high end rendering programs are very expensive and, more importantly, are not for sale but need to be leased on a weekly / monthly basis where licensing fees in the order of US$10,000 per week and license are just the beginning. Since the RADEON 9800 is also the backbone of a to be determined successor of the FireGL-X1, the little addition of the F-buffer could become a very valuable asset.

Next Page:    => On To The RADEON 9800 In The Flesh. =>

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